Semiconductor device having a fuse element
View Patent ↗The present invention provides a semiconductor device realizing reliable cutting of a fuse without enlarging layout area of a fuse element and the reduced number of wiring layers of a preventing wall that prevents diffusion of fuse copper atoms. A fuse is formed by using a wire in a metal wiring layer as an upper layer in a plurality of metal wiring layers. Wires are disposed just above and just below a fuse each with a gap of at least two wiring layers. In an upper layer, a power wire that transmits power supply voltage is used as a part covering a preventing wall structure just above the fuse.
1. A semiconductor device comprising:
a semiconductor element in a semiconductor substrate;
first wires formed over the semiconductor element and formed at a first wiring layer;
second wires electrically connected to the first wires and formed at a second wiring layer which is one level upper than the first wiring layer;
third wires electrically connected to the second wires and formed at a third wiring layer which is one level upper than the second wiring layer;
fourth wires electrically connected to the third wires and formed at a fourth wiring layer which is one level upper than the third wiring layer;
a power supply wire formed at a fifth wiring layer which is one level upper than the fourth wiring layer; and
a fuse formed at the third wiring layer, wherein
the fuse includes a copper film,
the power supply wire overlaps the fuse in a planar view,
a diffusion preventing film having the first, second, third and fourth wires does not overlap the fuse in a planar view and surrounds the fuse in a planar view, and
in regions which overlap the fuse in a planar view, no wire is formed in the second and fourth wiring layers.
2. The semiconductor device according to claim 1 , wherein the power supply wire is formed in a stripe shape crossing the fuse above the fuse.
3. The semiconductor device according to claim 1 , wherein the power supply wire includes a solid wire disposed so as to cross the fuse above the fuse.
4. The semiconductor device according to claim 1 ,
wherein a state of an internal circuit is set according to whether the fuse element is cut or not,
wherein a power supply voltage supplied from a pad different from a pad that supplies an operation power supply voltage to the internal circuit is supplied to the power supply wire.
5. The semiconductor device according to claim 4 , wherein the voltage of the power supply wire is set to a ground voltage level in a normal operation mode of the internal circuit and is set to a voltage level necessary for cutting the fuse in a fuse cutting period of cutting the fuse, the voltage level being different from the power supply voltage of the internal circuit.
6. The semiconductor device according to claim 1 , wherein the diffusion preventing film has a first diffusion preventing portion and a second diffusion preventing portion, and in a planar view, the first diffusion preventing portion is nearer the fuse than the second diffusion preventing portion.
7. The semiconductor device according to claim 6 , wherein the second diffusion preventing portion is electrically connected to the power supply wire.
8. The semiconductor device according to claim 6 , wherein the first diffusion preventing portion is electrically connected to the semiconductor element.
9. The semiconductor device according to claim 1 , wherein, in a region which overlaps the fuse in a planar view, no wire is formed at the first wiring layer.
10. The semiconductor device according to claim 1 , wherein each of the first, second, third and fourth wires includes a copper film.