IP Library Patent Application 12719392
Patent Application
App. No. 12/719,392

STORAGE DEVICE USING NON-VOLATILE MEMORY

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Quick Facts
Patent No.
US None
App. No.
12/719,392
Abstract

According to one embodiment, a storage device includes a plurality of writable non-volatile memory devices, a buffer memory, a memory controller, and a spare non-volatile memory device. The buffer memory temporarily stores write data from a host. The memory controller writes the write data in the buffer memory to the non-volatile memory devices in a distributed manner. The memory controller writes write data in the buffer memory not having been written to the non-volatile memory devices to the spare non-volatile memory device when detecting a power down, and writes the write data having been written to the spare non-volatile memory device to the buffer memory when the power is restored.

Claims (22)

1 . A storage device comprising:

a plurality of writable non-volatile memory devices;

a buffer memory configured to temporarily store write data from a host;

a memory controller configured to write the write data in the buffer memory to the non-volatile memory devices in a distributed manner; and

a spare non-volatile memory device,

wherein the memory controller is configured to write the write data in the buffer memory not yet written to the non-volatile memory devices to the spare non-volatile memory device when detecting a power down, and write the write data written to the spare non-volatile memory device to the buffer memory when the power is restored.

2 . The storage device according to claim 1 , wherein the memory controller is configured to supply a spare power to only the spare non-volatile memory device when detecting the power down.

3 . The storage device according to claim 1 , further comprising:

an interface circuit configured to control an interface to the host; and

a control circuit configured to analyze a command from the host, write the write data to the buffer memory, and notify the host of processing completion.

4 . The storage device according to claim 1 , wherein

the buffer memory comprises a management table for storing a logical address of the write data and a redundant information indicating whether the write data has already been written for each write data item, and

the memory controller is configured to extract the write data not yet written based on the redundant information.

5 . The storage device according to claim 4 , wherein the memory controller is configured to create an address management table of the write data not yet written from the management table, and write the address management table to the spare non-volatile memory device.

6 . The storage device according to claim 5 , wherein the memory controller is configured to combine management information items from a plurality of write data items which have not been written and have a sequential relationship in the buffer memory, update the address management table, and write the address management table to the spare non-volatile memory device.

7 . The storage device according to claim 3 , wherein the buffer memory is a read and write cache memory of the non-volatile memory devices.

8 . The storage device according to claim 7 , wherein the memory controller is configured to access the non-volatile memory devices in parallel to perform read and write operations.

9 . The storage device according to claim 5 , wherein the memory controller is configured to sequentially write the write data items not yet written to a continuous area in the spare non-volatile memory device, and update the address management table storing a physical address of the continuous area for the write data items not yet written.

10 . The storage device according to claim 5 , wherein the memory controller is configured to write the write data to a predetermined area in the buffer memory according to the address management table stored in the spare non-volatile memory device when the power is restored.

11 . The storage device according to claim 1 , wherein

the non-volatile memory devices comprise a flash memory, and

the memory controller comprises a flash controller.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 13, 2010
From: INAMURA, SEIJI
To: TOSHIBA STORAGE DEVICE CORPORATION
Reel/Frame 024227/0360 →