Magnetoresistive random access memory device
View Patent ↗An aspect of the present disclosure, there is provided a magnetoresistive random access memory device, including, an active area formed on a semiconductor substrate in a first direction, a magnetoresistive effect element formed on the active area and storing data by a change in resistance value, a gate electrode of a cell transistor formed on each side of the magnetoresistive effect element on the active area in a second direction, a bit line contact formed on the active area and arranged alternately with the magnetoresistive effect element, a first bit line connected to the magnetoresistive effect, and a second bit line connected to the bit line contact.
1. A magnetoresistive random access memory device, comprising:
a plurality of memory cells, each of the memory cells comprising:
a magnetoresistive effect element above an active area extending in a first direction on a semiconductor substrate, the magnetoresistive effect element configured to store data from a change in a resistance value;
a pair of cell transistors on the active area on both sides of the magnetoresistive effect element, a gate electrode of each of the cell transistors being in a second direction orthogonal to the first direction;
a pair of bit line contacts on the active area on a side of each of the gate electrodes opposite to the magnetoresistive effect element;
a first bit line in the first direction connected to the magnetoresistive effect element; and
a second bit line in the first direction connected to the bit line contacts,
wherein each of the bit line contacts is shared by each of the adjacent memory cells and a width of the active area in the second direction is substantially the same as the width of the bit line contacts.
2. The device of claim 1 , wherein
at least one of the active area, the first bit line and the second bit line comprises a curvilinear shape.
3. The device of claim 1 , wherein
the first bit line comprises a linear shape, and the second bit line comprises a first oblique linear shape with respect to the first bit line.
4. The device of claim 1 , wherein
a width of the gate electrode of the cell transistor in the first direction and a distance between the adjacent gate electrodes in the first direction are substantially the same as the width of the bit line contacts.
5. The device of claim 1 , wherein
a height of the first bit line from the semiconductor substrate and a height of the second bit line from the semiconductor substrate are different.
6. The device of claim 5 , wherein
a height of the first bit line from the semiconductor substrate is higher than a height of the second bit line from the semiconductor substrate.
7. The device of claim 1 , wherein
each of the cell transistors comprises shared source/drain regions in the active area to share each of the shared source/drain regions with a cell transistor of each of the adjacent cells.
8. The device of claim 7 , wherein
the magnetoresistive effect element is above one of the shared source/drain regions, and a bottom of a ferromagnetic material layer in a lower portion of the magnetoresistive effect element and the one of the shared source/drain regions are connected to each other through a contact, and the bit line contact is on the other of the shared source/drain region.
9. The device of claim 1 , wherein the active area is a strip shape along the first direction.
10. A magnetoresistive random access memory device, comprising:
a plurality of memory cells, each of the memory cells comprising:
a magnetoresistive effect element above an active area extending in a first direction on a semiconductor substrate, the magnetoresistive effect element configured to store data from a change in a resistance value;
a pair of cell transistors on the active area on both sides of the magnetoresistive effect element, a gate electrode of each of the cell transistors being in a second direction orthogonal to the first direction;
a pair of bit line contacts on the active area on a side of each of the gate electrodes opposite to the magnetoresistive effect element;
a first bit line in the first direction connected to the magnetoresistive effect element; and
a second bit line in the first direction connected to the bit line contacts,
wherein each of the bit line contacts is shared by each of the adjacent memory cells and a width of the active area in the second direction is substantially smaller than twice as large as a width of the bit line contact in the second direction.
11. The device of claim 10 , wherein
at least one of the active area, the first bit line and the second bit line comprises a curvilinear shape.
12. The device of claim 10 , wherein
the first bit line comprises a linear shape, and the second bit line comprises a first oblique linear shape with respect to the first bit line.
13. The device of claim 10 , wherein
a width of the gate electrode of the cell transistor in the first direction and a distance between the adjacent gate electrodes are substantially the same as the width of the bit line contacts.
14. The device of claim 10 , wherein
a height of the first bit line from the semiconductor substrate and a height of the second bit line from the semiconductor substrate are different.
15. The device of claim 14 , wherein
a height of the first bit line from the semiconductor substrate is higher than a height of the second bit line from the semiconductor substrate.
16. The device of claim 10 , wherein
the first bit line and the second bit line intersect with each other from a top view.
17. The device of claim 10 , wherein
each of the cell transistors, comprise shared source/drain regions to share each of the shared source/drain regions with a cell transistor of each of the adjacent cells.
18. The device of claim 17 , wherein
the magnetoresistive effect element is above one of the shared source/drain region, and a bottom of a ferromagnetic material layer in a lower portion of the magnetoresistive effect element and the one of the shared source/drain regions are connected to each other through a contact, and the bit line is on the other of the shared source/drain region.
19. The device of claim 10 , wherein the active area is a strip shape along the first direction.