SUBPIXEL STRUCTURE AND LIQUID CRYSTAL DISPLAY PANEL
A subpixel structure of a liquid crystal display is disclosed. The subpixel structure is disposed between a first substrate and a second substrate, in which the subpixel structure includes a first portion and a second portion. The subpixel structure further includes: a data line, a first scan line and a second scan line intersecting the data line; a first transistor disposed on the first scan line and connected to the first portion of the subpixel structure; a second transistor disposed on the first scan line and connected to the second portion of the subpixel structure; and a third transistor disposed on the second scan line and connected to the second portion of the subpixel structure.
1 . A subpixel structure of a liquid crystal display, disposed between a first substrate and a second substrate, wherein the subpixel structure comprises a first portion and a second portion, the subpixel structure further comprising:
a data line;
a first scan line intersecting the data line;
a second scan line intersecting the data line;
a first transistor disposed on the first scan line and connected to the first portion of the subpixel structure;
a second transistor disposed on the first scan line and connected to the second portion of the subpixel structure; and
a third transistor disposed on the second scan line and connected to the second portion of the subpixel structure.
2 . The subpixel structure of claim 1 , wherein the subpixel structure comprises a red subpixel, a green subpixel, or a blue subpixel.
3 . The subpixel structure of claim 1 , further comprising at least one capacitor disposed in the first portion of the subpixel structure and connected to the first transistor.
4 . The subpixel structure of claim 1 , further comprising at least one capacitor disposed in the second portion of the subpixel structure and connected to the second transistor and the third transistor.
5 . The subpixel structure of claim 1 , further comprising a fourth transistor disposed on the second scan line.
6 . The subpixel structure of claim 5 , wherein the fourth transistor is connected to a third portion of another subpixel structure adjacent to the subpixel structure.
7 . The subpixel structure of claim 5 , wherein each of the first transistor, the second transistor, the third transistor, and the fourth transistor is a thin film transistor.
8 . The subpixel structure of claim 1 , wherein the first substrate comprises a color filter array substrate.
9 . The subpixel structure of claim 1 , wherein the second substrate comprises a thin film transistor array substrate.
10 . The subpixel structure of claim 1 , further comprising at least one pixel electrode disposed in the first portion of the subpixel structure and connected to the first transistor.
11 . The subpixel structure of claim 1 , further comprising at least one pixel electrode disposed in the second portion of the subpixel structure and connected to the second transistor and the third transistor.
12 . The subpixel structure of claim 1 , each of the first transistor, the second transistor, and the third transistor is connected to the data line.
13 . A method for driving a liquid crystal display panel, comprising:
providing a subpixel structure having a first portion and a second portion, a data line, and a first scan line and a second scan line intersecting the data line;
inputting a first voltage from the data line at a first time period for charging the first portion of the subpixel structure and pre-charging the second portion of the subpixel structure simultaneously; and
inputting a second voltage from the data line at a second time period for only charging the second portion of the subpixel structure.
14 . The method of claim 13 , wherein the first voltage is different from the second voltage.
15 . The method of claim 13 , further comprising disposing a first transistor and a second transistor on the first scan line and connecting the first transistor and the second transistor to the first portion of the subpixel structure, and disposing a third transistor on the second scan line and connecting the third transistor to the second portion of the subpixel structure.
16 . The method of claim 15 , further comprising disposing a fourth transistor on the second scan line and connecting the fourth transistor to a third portion of another subpixel structure adjacent to the subpixel structure.
17 . A liquid crystal display panel, comprising:
a first substrate and a second substrate;
at least a subpixel structure disposed between the first substrate and the second substrate, wherein the subpixel structure comprises a first portion and a second portion, the subpixel structure further comprising:
a data line;
a first scan line intersecting the data line;
a second scan line intersecting the data line;
a first transistor disposed on the first scan line and connected to the first portion of the subpixel structure;
a second transistor disposed on the first scan line and connected to the second portion of the subpixel structure; and
a third transistor disposed on the second scan line and connected to the second portion of the subpixel structure; and
a liquid crystal layer disposed between the first substrate and the subpixel structure.
18 . The liquid crystal display panel of claim 17 , wherein the subpixel structure comprises a red subpixel, a green subpixel, or a blue subpixel.
19 . The liquid crystal display panel of claim 17 , further comprising at least one capacitor disposed in the first portion of the subpixel structure and connected to the first transistor.
20 . The liquid crystal display panel of claim 17 , further comprising at least one capacitor disposed in the second portion of the subpixel structure and connected to the second transistor and the third transistor.
21 . The liquid crystal display panel of claim 17 , further comprising a fourth transistor disposed on the second scan line.
22 . The liquid crystal display panel of claim 21 , wherein the fourth transistor is connected to a third portion of another subpixel structure adjacent to the subpixel structure.
23 . The liquid crystal display panel of claim 21 , wherein each of the first transistor, the second transistor, the third transistor, and the fourth transistor is a thin film transistor.
24 . The liquid crystal display panel of claim 17 , wherein the first substrate comprises a color filter array substrate.
25 . The liquid crystal display panel of claim 17 , wherein the second substrate comprises a thin film transistor array substrate.
26 . The liquid crystal display panel of claim 17 , further comprising at least one pixel electrode disposed in the first portion of the subpixel structure and connected to the first transistor.
27 . The liquid crystal display panel of claim 17 , further comprising at least one pixel electrode disposed in the second portion of the subpixel structure and connected to the second transistor and the third transistor.
28 . An electronic device, comprising:
the liquid crystal display panel of claim 17 ; and
a controller electrically connected to the liquid crystal display panel and providing image data to the liquid crystal display panel.