Granted Patent B2

US 8,578,216 · App. 12/721,667 · Granted Nov 5, 2013

Abstract

Claims (11)

1. An execution history tracing method of tracing an execution history of a CPU upon executing, in a semiconductor device including the CPU, a program by using the CPU, for a tracing target, from outside the semiconductor device via software, the execution history tracing method comprising:

recording, in a buffer, target information as trace information about an execution of one or more tracing target, for each instruction execution cycle in which the target information is produced as the execution history; and

performing data sorting by using the software to group the trace information about the execution of the one or more tracing target, the trace information being recorded for the each instruction execution cycle, for each of the one or more tracing target,

wherein in the recording, the trace information is recorded in the buffer having a bit width that allows for storing all the target information that is produced in the each instruction execution cycle using a trace frame format having a fixed bit width for the each instruction and is larger than a bit width of the CPU.

2. The execution history tracing method according to claim 1 , wherein a debugging circuit included in the semiconductor device records the trace information in the buffer, and the software executed on a computer coupled to the semiconductor device performs the data sorting.

3. The execution history tracing method according to claim 1 , wherein the one or more tracing target includes branch information representing a history of an instruction execution, and data access information representing a history of a data access execution, and the trace information recorded for the each instruction execution cycle in the buffer includes a bit for storing data representing a branch source, a bit for storing data representing a branch destination, a bit for storing data representing a branch factor, a bit representing an executing program counter value, a bit for storing data representing validity of a read data value, a bit for storing a read data ID, a bit for storing a read data value, a bit for storing data representing validity of a data access, a bit for storing data representing a read or write access, a bit for storing data representing an access size, a bit for storing an access address, a bit for storing write data, and a bit for storing a read access ID.

4. The execution history tracing method according to claim 1 , further comprising: specifying the one or more tracing target, and wherein, in the recording, the trace information is recorded in the buffer for the each instruction execution cycle in which the target information is produced.

5. An execution history tracing method for a semiconductor device including a CPU, the method comprising:

executing a program by using the CPU; and

tracing, from outside the semiconductor device via software, one or more tracing target included in an execution history upon executing the program, wherein for each instruction execution cycle in which target information is produced as the execution history, the target information is recorded as trace information about an execution of the one or more tracing target, in a buffer, and data sorting of the trace information is performed by the software so that data of the trace information is grouped for each of the one or more tracing target,

wherein in the recording, the trace information is recorded in the buffer using a bit width that allows for storing all the target information that is produced in the each instruction execution cycle using a trace frame format having a fixed bit width for the each instruction and is larger than a bit width of the CPU.

Assignments (6)