IP Library Granted Patent US 9,169,554
Granted Patent B2
US 9,169,554 · App. 12/725,308 · Granted Oct 27, 2015

Wafer carrier track

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Quick Facts
Patent No.
US 9,169,554
App. No.
12/725,308
Granted
Oct 27, 2015
Kind
B2
Abstract

Embodiments of the invention generally relate to apparatuses for chemical vapor deposition (CVD) processes. In one embodiment, a wafer carrier track for levitating and traversing a wafer carrier within a vapor deposition reactor system is provided which includes upper and lower sections of a track assembly having a gas cavity formed therebetween. A guide path extends along an upper surface of the upper section and between two side surfaces which extend along and above the guide path and parallel to each other. A plurality of gas holes along the guide path extends from the upper surface of the upper section, through the upper section, and into the gas cavity. In some examples, the upper and lower sections of the track assembly may independently contain quartz, and in some examples, may be fused together.

Claims (21)

1. A wafer carrier track for levitating and traversing a wafer carrier within a vapor deposition reactor system, comprising: a first track assembly having a first upper section disposed over a first lower section in a first vapor deposition reactor; a first gas cavity formed between the first upper and lower sections of the first track assembly; a first guide path extending along a first upper surface of the first upper section; two first side surfaces extending along and above the first guide path and parallel to each other, wherein the first guide path extends between the first two side surfaces; a first plurality of gas holes within the first guide path and extending from the first upper surface of the first upper section, through the first upper section, and into the first gas cavity; and a first upper lap joint disposed at one end of the first track assembly and a first lower lap joint disposed at the opposite end of the first track assembly, wherein the first upper lap joint extends a portion of the first guide path and the first two side surfaces and the first lower lap joint comprises a first upper surface extending further than the first guide path and the first two side surfaces of the first track assembly;

a second track assembly having a second upper section disposed over a second lower section in a second vapor deposition reactor coupled to the first vapor deposition reactor at an interface; a second gas cavity formed between the second upper and lower sections of the second track assembly;

a second guide path extending along a second upper surface of the second upper section, the second guide path aligned with the first guide path; two second side surfaces extending along and above the second guide path and parallel to each other, wherein the second guide path extends between the second two side surfaces; a second plurality of gas holes within the second guide path and extending from the second upper surface of the second upper section, through the second upper section, and into the second gas cavity; and a second upper lap joint disposed at one end of the second track assembly and a second lower lap joint disposed at the opposite end of the second track assembly, wherein the second upper lap joint extends a portion of the second guide path and the second two side surfaces and the second lower lap joint comprises a second upper surface extending further than the second guide path and the second two side surfaces of the second track assembly, and wherein the upper lap joint of one of the track assemblies is disposed over the lower lap joint of the other track assembly.

2. The wafer carrier track of claim 1 , wherein the first and second upper sections comprise quartz.

3. The wafer carrier track of claim 1 , wherein the first and second lower sections comprise quartz.

4. The wafer carrier track of claim 1 , wherein each of the first and second upper sections and the first and second lower sections independently comprises quartz.

5. The wafer carrier track of claim 4 , wherein the first and second upper sections and the first and second lower sections are fused together.

6. The wafer carrier track of claim 5 , wherein the first and second upper sections and the first and second lower sections comprise quartz.

7. The wafer carrier track of claim 6 , wherein each of the first and second lower sections comprises a quartz plate.

8. The wafer carrier track of claim 1 , wherein a gas port extends from a side surface of each of the first and second upper sections, through a portion of each of the first and second upper sections, and into each of the first and second gas cavities.

9. The wafer carrier track of claim 1 , wherein each of the first and second pluralities of gas holes comprises from about 10 holes to about 50 holes.

10. The wafer carrier track of claim 9 , wherein each of the first and second pluralities of gas holes comprises from about 20 holes to about 40 holes.

11. The wafer carrier track of claim 10 , wherein each gas hole has a diameter within a range from about 0.005 inches to about 0.05 inches.

12. The wafer carrier track of claim 11 , wherein the diameter is within a range from about 0.01 inches to about 0.03 inches.

13. The wafer carrier track of claim 1 , further comprising a levitating wafer carrier disposed on each of the first and second guide paths, and the levitating wafer carrier comprises at least one indentation pocket disposed within a lower surface.

14. The wafer carrier track of claim 13 , wherein the levitating wafer carrier comprises at least two indentation pockets disposed within the lower surface.

15. The wafer carrier track of claim 13 , wherein the levitating wafer carrier comprises graphite.

16. The wafer carrier track system of claim 1 , comprising:

the second upper lap joint of the second wafer carrier track assembly disposed over a third lower lap joint of a third wafer carrier track assembly of a third chemical vapor reactor.

17. The wafer carrier track of claim 1 , further comprising an exhaust purge port disposed between the first wafer track assembly and the second wafer track assembly.

18. The wafer carrier track of claim 1 , wherein the upper lap joints of one of the first track assemblies is disposed over the lower lap joint of the other track assembly in a coupled chemical vapor reactor comprising the first and second vapor deposition reactors.

Assignments (11)
SECURITY INTEREST Recorded Aug 28, 2023
From: UTICA LEASECO, LLC
To: TIGER FINANCE, LLC
Reel/Frame 064731/0814 →
CORRECTIVE ASSIGNMENT TO CORRECT THE THE ASSIGNEE ADDRESS PREVIOUSLY RECORDED AT REEL: 055766 FRAME: 0279. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Aug 9, 2021
From: UTICA LEASECO, LLC SECURED PARTY
To: UTICA LEASECO, LLC ASSIGNEE
Reel/Frame 057117/0811 →
CONFIRMATION OF FORECLOSURE TRANSFER OF PATENT RIGHTS Recorded Feb 25, 2021
From: UTICA LEASECO, LLC SECURED PARTY
To: UTICA LEASECO, LLC ASSIGNEE
Reel/Frame 055766/0279 →
SECURITY INTEREST Recorded Apr 29, 2019
From: ALTA DEVICES, INC.
To: UTICA LEASECO, LLC
Reel/Frame 049027/0944 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 11, 2016
From: HANERGY GLOBAL INVESTMENT AND SALES PTE. LTD
To: ALTA DEVICES, INC.
Reel/Frame 038066/0958 →
CHANGE OF NAME Recorded Mar 4, 2016
From: ALTA DEVICES, INC.
To: AWBSCQEMGK, INC.
Reel/Frame 038005/0990 →
CHANGE OF NAME Recorded Mar 4, 2016
From: HANERGY ACQUISITION SUB INC.
To: ALTA DEVICES, INC.
Reel/Frame 038006/0457 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 4, 2016
From: ALTA DEVICES, INC.
To: HANERGY GLOBAL INVESTMENT AND SALES PTE. LTD.
Reel/Frame 038004/0078 →
RELEASE OF SECURITY INTEREST Recorded Jan 16, 2015
From: SILICON VALLEY BANK, AS COLLATERAL AGENT
To: AWBSCQEMGK, INC. (F/K/A ALTA DEVICES, INC.)
Reel/Frame 034775/0973 →
SECURITY AGREEMENT Recorded Apr 10, 2013
From: ALTA DEVICES, INC.
To: SILICON VALLEY BANK, AS AGENT
Reel/Frame 030192/0391 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 4, 2010
From: HE, GANG; HIGASHI, GREGG; SORABJI, KHURSHED; HAMAMJY, ROGER; HEGEDUS, ANDREAS
To: ALTA DEVICES, INC.
Reel/Frame 024327/0962 →