IP Library Granted Patent US 8,509,300
Granted Patent B2
US 8,509,300 · App. 12/734,084 · Granted Aug 13, 2013

Transmitter with reduced power consumption and increased linearity

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Quick Facts
Patent No.
US 8,509,300
App. No.
12/734,084
Granted
Aug 13, 2013
Kind
B2
Abstract

The application refers to an apparatus comprising, a signal generator ( 102, 102 a ) configured to generate a signal, a first pulse width modulating unit ( 106 ) configured to modulate the signal, an amplifier unit ( 110 ) configured to amplify the modulated signal, a feedback loop path ( 108 a ) configured to correct the modulated signal using an error signal, wherein the apparatus comprises a second pulse width modulating ( 108 ) unit configured to modulate the error signal onto the modulated signal.

Claims (42)

1. An apparatus comprising:

a signal generator configured to generate a signal having an amplitude component and a phase component;

a first pulse position modulating unit configured to modulate the phase component of the generated signal;

a first pulse width modulating unit configured to modulate the amplitude component of the generated signal onto the phase modulated signal;

an amplifier unit configured to amplify the amplitude and phase modulated signal;

a feedback loop path configured to correct the amplitude and phase modulated signal using an error signal; and

a second pulse width modulating unit configured to modulate the error signal onto the amplitude and phase modulated signal.

2. The apparatus according to claim 1 , wherein the signal generator is configured to generate a polar signal.

3. The apparatus according to claim 1 , wherein the amplifying unit is a switching power amplifier.

4. The apparatus according to claim 1 , wherein the apparatus comprises a predistortion unit configured to predistort the generated signal.

5. The apparatus according to claim 1 , wherein the feedback loop path comprises a second pulse position modulating unit configured to modulate an error signal onto the amplitude and phase modulated signal.

6. The apparatus according to claim 1 , wherein the first pulse position modulating unit comprises a first mapping unit configured to map the phase component to at least one suitable function according to a chosen implementation of the first pulse position modulating unit.

7. The apparatus according to claim 1 , wherein the first pulse position modulating unit comprises a first up converting unit.

8. The apparatus according to claim 1 , wherein the first pulse width modulating unit and the first pulse position modulating unit are arranged as one pulse width pulse position modulating unit.

9. The apparatus according to claim 4 , wherein the predistortion unit is configured to determine a phase shift function depending on the generated signal.

10. The apparatus according to claim 4 , wherein the predistortion unit comprises a first determining unit configured to determine a duty cycle function depending on the generated signal.

11. The apparatus according to claim 5 , wherein the second pulse width modulating unit and the second pulse position modulating unit are arranged as one pulse width pulse position modulating unit.

12. The apparatus according to claim 6 , wherein the first pulse width modulating unit comprises a second mapping unit configured to map the phase shift function to at least one suitable function according to a chosen implementation of the first pulse width modulating unit.

13. The apparatus according to claim 7 , wherein the first pulse width modulating unit comprises a second up converting unit.

14. The apparatus according to claim 8 , wherein the feedback loop path comprises a down converting and error detecting unit.

15. The apparatus according to claim 10 , wherein the predistortion unit comprises a second determining unit configured to determine the phase shift function depending on the determined duty cycle function.

16. A method comprising:

generating a signal having an amplitude component and a phase component;

modulating the phase component of the generated signal using pulse position modulation;

modulating the amplitude component of the generated signal onto the phase modulated signal using pulse width modulation;

amplifying the amplitude and phase modulated signal;

generating an error signal in a feedback loop path; and

modulating the error signal onto the amplitude and phase modulated signal using pulse width modulation.

17. A non-transitory computer readable medium having a computer program stored thereon, the computer program comprising instructions operable to cause a processor to perform the method steps of:

generating a signal having an amplitude component and a phase component;

modulating the phase component of the generated signal using pulse position modulation;

modulating the amplitude component of the generated signal onto the phase modulated signal using pulse width modulation;

amplifying the amplitude and phase modulated signal;

generating an error signal in a feedback loop path; and

modulating the error signal onto the amplitude and phase modulated signal.

18. A transmitter comprising an apparatus comprising:

a signal generator configured to generate a signal having an amplitude component and a phase component;

a first pulse position modulating unit configured to modulate the phase component of the generated signal;

a first pulse width modulating unit configured to modulate the amplitude component of the generated signal onto the phase modulated signal;

an amplifier unit configured to amplify the amplitude and phase modulated signal;

a feedback loop path configured to correct the amplitude and phase modulated signal using an error signal; and

a second pulse width modulating unit configured to modulate the error signal onto the amplitude and phase modulated signal.

Assignments (4)
STATUS CHANGE-ENTITY IN LIQUIDATION Recorded Feb 2, 2016
From: ST-ERICSSON SA
To: ST-ERICSSON SA, EN LIQUIDATION
Reel/Frame 037739/0493 →
CHANGE OF NAME Recorded Aug 24, 2012
From: ST WIRELESS SA
To: ST-ERICSSON SA
Reel/Frame 028845/0622 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 24, 2010
From: NXP B.V.
To: ST WIRELESS SA
Reel/Frame 025040/0886 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 23, 2010
From: VROMANS, JAN S.
To: NXP B.V.
Reel/Frame 025081/0653 →