Capacitative sensor system
The invention relates to a capacitive sensor system, in particular for detecting the approach of objects and in particular also for gesture recognition. The problem of the present invention is to provide a capacitively operating sensor system, which can be implemented with low component complexity and thus low costs and space requirements and is also characterized by low power consumption, so as to operate with batteries having a low charge capacity and/or a long operating time. Said problem is solved according to the invention by a circuit configuration for generating an output signal correlating with an approximation process based on changes in the dielectric properties of the surroundings of a sensor electrode, having a sensor electrode which is adjacent to an observation area in at least some sections, a microcontroller circuit (μC) for output of an alternating voltage, a voltage divider circuit for achieving an adjustment of the level of the alternating voltage output by the microcontroller (μC), and a field effect transistor (FET) in the function of an impedance converter, wherein the field effect transistor is incorporated into the circuit configuration in such a way that the voltage output by the voltage divider circuit is present at the gate input thereof and at the same time at the sensor electrode (ES).
1. A circuit arrangement for generating an output signal correlated with an approach based on changes of the dielectric properties of the environment of a sensor electrode, the circuit arrangement comprising:
a sensor electrode that at least partly juxtaposed with an observation area;
a microcontroller outputting a square-wave voltage;
a voltage attenuation circuit external to said microcontroller receiving the square-wave voltage, the voltage attenuation circuit being directly connected between an output of the microcontroller and ground and adjusting a level of the square-wave voltage outputted by the microcontroller, wherein the voltage attenuation comprises an output connected with the sensor electrode via a charging resistor; and
a field-effect transistor (FET) operating as an impedance converter comprising a gate terminal directly connected with the sensor electrode and via the charging resistor with the output of the voltage attenuation circuit, wherein the charging resistor is dimensioned such that during a semi-period of the square-wave voltage an almost complete charge and discharge at the gate terminal of the FET occurs.
2. The circuit arrangement according to claim 1 , wherein the field-effect transistor is integrated into the circuit arrangement as a source follower as an input stage.
3. The circuit arrangement according to claim 2 , wherein the effect of parasitic capacitors formed by the gate terminal capacitance of the FET, the electrode capacitance relative to ground and structurally conditioned circuit capacitors, is used as a capacitor device C 1 for the sensor function.
4. The circuit arrangement according to claim 3 , wherein the voltage attenuation circuit comprises a voltage divider comprising a first and second resistor connected in series and the charging resistance is connected between a voltage dividing node of the first and second resistor and the gate terminal.
5. The circuit arrangement according to claim 4 , wherein the square-wave voltage is delivered by the microcontroller in the frequency range from 80 to 120 kHz.
6. The circuit arrangement according to claim 5 , wherein the capacitor device C 1 is charged to a charge voltage u 0 and a time interval t 1 is determined by a threshold voltage value u S1 and discharged after half a cycle duration T of the square signal and a time interval t 2 is determined by a threshold voltage value use.
7. The circuit arrangement according to claim 6 , wherein the switching times are coordinated in such a way that the following applies:
t 1=− RC 1 ln(1− u S1 /u 0 ) t 2=− RC 1 ln( u S2 /u 0 ),
wherein R represents the charging resistance.
8. The circuit arrangement according to claim 3 , wherein wherein the capacitor device C 1 is charged to a charge voltage u 0 and a time interval t 1 is determined by a threshold voltage value u S1 and discharged after half a cycle duration T of the square signal and a time interval t 2 is determined by a threshold voltage value use.
9. The circuit arrangement according to claim 5 , wherein the charging resistance is determined in such a way that it is at a maximum each time during a half period T/2 of the square signal until an almost complete charge and discharge at the gate terminal of the field-effect transistor occurs.
10. The circuit arrangement according to claim 6 , wherein the approach is detected based on a time difference of said time intervals t 1 , t 2 .
11. The circuit arrangement according to claim 6 , wherein, threshold voltage values u S1 and u S2 are determined by an XOR gate whose inputs are switched by integrated Schmitt triggers.
12. The circuit arrangement according to claim 11 , wherein a time difference is represented by a DC voltage obtained by a low-pass filter connected to the XOR output.
13. The circuit arrangement according to claim 1 , wherein a coupling electrode EG connected with ground is provided.
14. The circuit arrangement according to claim 13 , wherein the coupling electrode EG, in the form of a coupling capacitance between ES and EG, delivers a further contribution to C 1 .
15. The circuit arrangement according to claim 13 , wherein a shield electrode is provided between the signal electrode ES and the electrode EG.
16. The circuit arrangement according to claim 15 , wherein the shield electrode is connected to a source of the FET and lies on almost equal potential as the gate terminal, by which the coupling ES and EG is reduced.
17. The circuit arrangement according to claim 1 , wherein a source terminal of the FET is used for driving a braid of a coaxial cable connecting said gate of the FET and said signal electrode ES, in order to reduce a cable capacitance.
18. A circuit arrangement for generating an output signal correlating with an approach of the dielectric properties of the environment because of changes of a sensor electrode, the circuit arrangement comprising:
a sensor electrode at least partly juxtaposed with an observation area;
a microcontroller outputting a square-wave voltage;
a voltage divider external to said microcontroller and being directly connected between an output of the microcontroller and ground and operable to adjust a level of the square-wave voltage outputted by the microcontroller; and
a field-effect transistor operating as an impedance converter and configured in such a way that an approach is detected based on an event correlating with the change of a ratio of charging time to discharging time, wherein an output of the voltage divider is connected via a charging resistor to a gate of the field effect transistor and to the sensor electrode, wherein the gate of the field effect transistor is directly connected with the sensor electrode and a drain of the field effect transistor is connected with a supply voltage, and wherein the charging resistor is dimensioned such that during a semi-period of the square-wave voltage an almost complete charge and discharge at the gate terminal of the FET occurs.
19. A circuit arrangement for generating an output signal correlated with an approach based on changes of the dielectric properties of the environment of a sensor electrode, the circuit arrangement comprising:
a sensor electrode that at least partly juxtaposed with an observation area;
a microcontroller outputting a square-wave voltage;
a voltage divider comprising a first and second resistor directly connected in series between an output of the microcontroller and ground for adjusting a level of the square-wave voltage outputted by the microcontroller; and
wherein the circuit arrangement further comprises a field effect transistor (FET) stage with only a single FET, wherein the FET having a gate terminal connected directly with the sensor electrode and operating as an impedance converter and integrated into the circuit arrangement in such a way that the voltage outputted by the voltage divider is connected via a charging resistor with the gate terminal and the sensor electrode, wherein the charging resistor is dimensioned such that during a semi-period of the square-wave voltage an almost complete charge and discharge at the gate terminal of the FET occurs.
20. The circuit arrangement according to claim 19 , wherein the field-effect transistor is integrated into the circuit arrangement as a source follower as an input stage, and the effect of parasitic capacitors formed by the gate terminal capacitance of the FET, the electrode capacitance relative to ground and structurally conditioned circuit capacitors, is used as a capacitor device C 1 for the sensor function.
21. A circuit arrangement for generating an output signal correlated with an approach based on changes of the dielectric properties of the environment of a sensor electrode, the circuit arrangement comprising:
a sensor electrode that at least partly juxtaposed with an observation area;
a microcontroller outputting a square-wave voltage;
a voltage divider for adjusting a level of the square-wave voltage outputted by the microcontroller being directly connected between an output of the microcontroller and ground, wherein the voltage attenuation comprises an output connected with the sensor electrode via a charging resistor; and
wherein the circuit arrangement further comprises a field effect transistor stage with only a single FET, wherein the single FET operates as an impedance converter comprising a gate terminal directly connected with the sensor electrode and via the charging resistor with the output of the voltage attenuation circuit and wherein a source of the FET provides the output signal.