Memory access control in a multiprocessor system
View Patent ↗Access to a memory area by a first processor that executes a first processor program and a second processor that executes a second processor program is granted to one of the first processor and the second processor at a time. Access to the memory area by the first processor and the second processor are cyclically uniquely allocated (e.g., t≡[(ad mod m)=o]) between the first and the second processor by the first and second processor programs.
1. A method for controlling access to a memory area by a first processor that executes a first processor program and a second processor that executes a second processor program, comprising:
granting access to the memory area to one of the first processor and the second processor at a time, where access to the memory area by the first processor and the second processor are cyclically uniquely allocated between the first and the second processor by the first and second processor programs,
where the step of granting comprises providing memory accesses to the memory area at the cyclically uniquely allocated program addresses (ad) for the first processor, which, in comparison with program addresses for memory accesses of the second processor are furnished at a value (o) offset relative to a cycle time (m), and where memory accesses of an o-th one of the processors occur at times and/or at processor program addresses ad satisfying the equality [(ad mod m)=o] where m is a value equal to or greater than the number of processors that cyclically uniquely access memory area.
2. The method of claim 1 , where in the first processor program a program jump is entered from an instantaneous program address (ad) to a subsequent program address (ad new ) according to the cyclical allocation for the first processor.
3. The method of claim 2 , where a program jump satisfying [(ad new −1) mod m]=[ad mod m] is entered, where m is a value equal to or greater than the number of processors.
4. The method of claim 1 , where memory accesses and/or program jumps within one of the processor programs are allocated to one or a plurality of last address bits of a corresponding program address (ad) of the corresponding processor (P), with the cyclical allocation taken into account.
5. The method of claim 1 , where the processor programs for the various ones of the processors, with regard to the times or program addresses (ad) for memory accesses and/or program jumps, are furnished in mutually matched fashion by a higher-level instance or a higher-level process.
6. A method for controlling access to a memory area by a first processor that executes a first processor program and a second processor that executes a second processor program, comprising:
granting access to the memory area to one of the first processor and the second processor at a time, where access to the memory area by the first processor and the second processor are cyclically uniquely allocated between the first and the second processor by the first and second processor programs,
where the step of granting comprises providing memory accesses to the memory area at the cyclically uniquely allocated program addresses (ad) for the first processor, which, in comparison with program addresses for memory accesses of the second processor are furnished at a value (o) offset relative to a cycle time (m), where the first and second processor programs execute temporally simultaneously with one another and memory accesses within the first processor program are entered at program addresses (ad) cyclically equal relative to the second processor program.
7. A multiprocessor system, comprising:
a plurality of processors comprising at least a first processor and a second processor;
a memory area to which each of the first and the second processors have access; and where
each of the plurality of processors includes a uniquely associated program sequence of executable program instructions that cooperate to provide access to the memory area to one of the first processor and the second processor at a time, where access to the memory area is cyclically uniquely allocated between the plurality of processors, by providing memory accesses to the memory area at the cyclically uniquely allocated program addresses (ad) for the first processor, which, in comparison with program addresses for memory accesses of the second processor are furnished at a value (o) offset relative to a cycle time (m), and where memory accesses of an o-th one of the processors occur at times and/or at processor program addresses ad satisfying the equality [(ad mod m)=o] where m is a value equal to or greater than the number of processors that cyclically uniquely access the memory area.
8. The multiprocessor system of claim 7 , where the uniquely associated program sequence of executable program instructions includes instructions that test the last bit of the program address to determine which of the first and second processors can access the memory area.