IP Library Granted Patent US 8,458,526
Granted Patent B2
US 8,458,526 · App. 12/749,309 · Granted Jun 4, 2013

Data storage device tester

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Quick Facts
Patent No.
US 8,458,526
App. No.
12/749,309
Granted
Jun 4, 2013
Kind
B2
Abstract

A data storage device (DSD) tester for testing a DSD is disclosed. The DSD tester comprises control circuitry operable to receive a DSD log from the DSD, wherein the DSD log comprises at least one entry identifying at least one error condition. A sequence of commands associated with the error condition is executed in order to determine whether the DSD is defective.

Claims (72)

1. A data storage device (DSD) tester for testing a DSD, the DSD tester comprising control circuitry operable to:

receive a DSD log from the DSD, wherein the DSD log comprises at least one entry identifying at least one marginal data sector identified during a read operation;

execute a sequence of commands associated with the marginal data sector; and

determine whether the DSD is defective in response to the executed sequence of commands,

wherein the sequence of commands comprises at least one of:

commands executed prior to the read operation; and

commands executed after the read operation.

2. The DSD tester as recited in claim 1 , wherein the sequence of commands comprises the read operation.

3. The DSD tester as recited in claim 1 , wherein the control circuitry is further operable to margin channel parameters prior to executing the sequence of commands.

4. The DSD tester as recited in claim 1 , wherein the control circuitry is further operable to margin channel parameters prior to executing the read operation.

5. The DSD tester as recited in claim 1 , wherein the sequence of commands comprises at least one write command, the control circuitry is further operable to:

read data from a data sector identified by the write command; and

write the read data to the data sector when executing the write command as part of the sequence of commands.

6. The DSD tester as recited in claim 1 , wherein the DSD comprises a retry log associated with the read operation, the retry log identifying a plurality of commands executed during a retry operation, the control circuitry is further operable to:

read the retry log from the DSD; and

execute the plurality of commands identified by the retry log.

7. The DSD tester as recited in claim 1 , wherein the DSD comprises a retry log associated with the read operation, the retry log identifying a plurality of commands executed during a retry operation, the control circuitry is further operable to:

modify the plurality of commands identified by the retry log; and

execute the modified plurality of commands.

8. The DSD tester as recited in claim 7 , wherein the control circuitry is further operable to transmit the modified plurality of commands to a manufacturer of the DSD.

9. The DSD tester as recited in claim 1 , wherein:

the DSD comprises a global log identifying a plurality of sequential commands executed by the DSD; and

the sequence of commands associated with the read operation comprises at least two subsets of the sequential commands identified by the global log.

10. The DSD tester as recited in claim 1 , wherein the control circuitry is further operable to transmit a result of the determination to a manufacturer of the DSD.

11. The DSD tester as recited in claim 1 , further comprising a screen, wherein the control circuitry is further operable to display a result of the determination on the screen.

12. The DSD tester as recited in claim 1 , wherein the control circuitry is further operable to execute the sequence of commands in response to a vendor specific command embedded in an Advanced Technology Attachment (ATA) command.

13. The DSD tester as recited in claim 1 , further comprising a plurality of bays, wherein the control circuitry is further operable to detect when the DSD has been inserted into one of the bays.

14. The DSD tester as recited in claim 1 , further comprising a Universal Serial Bus (USB) key operable to plug into a USB port of the DSD.

15. The DSD tester as recited in claim 1 , wherein the DSD comprises a disk.

16. The DSD tester as recited in claim 1 , wherein the DSD comprises a semiconductor memory.

17. A method of operating a data storage device (DSD) tester for testing a DSD, the method comprising:

receiving a DSD log from the DSD, wherein the DSD log comprises at least one entry identifying at least one marginal data sector identified during a read operation;

executing a sequence of commands associated with the marginal data sector; and

determining whether the DSD is defective in response to the executed sequence of commands,

wherein the sequence of commands comprises at least one of:

commands executed prior to the read operation; and

commands executed after the read operation.

18. The method as recited in claim 17 , wherein the sequence of commands comprises the read operation.

19. The method as recited in claim 17 , further comprising margining channel parameters prior to executing the sequence of commands.

20. The method as recited in claim 17 , further comprising margining channel parameters prior to executing the read operation.

21. The method as recited in claim 17 , wherein the sequence of commands comprises at least one write command, the method further comprising:

reading data from a data sector identified by the write command; and

writing the read data to the data sector when executing the write command as part of the sequence of commands.

22. The method as recited in claim 17 , wherein the DSD comprises a retry log associated with the read operation, the retry log identifying a plurality of commands executed during a retry operation, the method further comprising:

reading the retry log from the DSD; and

executing the plurality of commands identified by the retry log.

23. The method as recited in claim 17 , wherein the DSD comprises a retry log associated with the read operation, the retry log identifying a plurality of commands executed during a retry operation, the method further comprising:

modifying the plurality of commands identified by the retry log; and

executing the modified plurality of commands.

24. The method as recited in claim 23 , further comprising transmitting the modified plurality of commands to a manufacturer of the DSD.

25. The method as recited in claim 17 , wherein:

the DSD comprises a global log identifying a plurality of sequential commands executed by the DSD; and

the sequence of commands associated with the read operation comprises at least two subsets of the sequential commands identified by the global log.

26. The method as recited in claim 17 , further comprising transmitting a result of the determination to a manufacturer of the DSD.

27. The method as recited in claim 17 , further comprising displaying a result of the determination on a screen.

28. The method as recited in claim 17 , further comprising executing the sequence of commands in response to a vendor specific command embedded in an Advanced Technology Attachment (ATA) command.

29. The method as recited in claim 17 , further comprising detecting when the DSD has been inserted into a bay.

30. The method as recited in claim 17 , further comprising plugging a Universal Serial Bus (USB) key into a USB port of the DSD.

31. The method as recited in claim 17 , wherein the DSD comprises a disk.

32. The method as recited in claim 17 , wherein the DSD comprises a semiconductor memory.

33. A data storage device (DSD) tester for testing a DSD, the DSD tester comprising control circuitry operable to:

receive a DSD log from the DSD, wherein the DSD log comprises at least one entry identifying at least one error condition;

execute a sequence of commands associated with the error condition, wherein the sequence of commands comprises at least one write command;

read data from a data sector identified by the write command;

write the read data to the data sector when executing the write command as part of the sequence of commands; and

determine whether the DSD is defective in response to the executed sequence of commands.

34. A method of operating a data storage device (DSD) tester for testing a DSD, the method comprising:

receiving a DSD log from the DSD, wherein the DSD log comprises at least one entry identifying at least one error condition;

executing a sequence of commands associated with the error condition, wherein the sequence of commands comprises at least one write command;

reading data from a data sector identified by the write command;

writing the read data to the data sector when executing the write command as part of the sequence of commands; and

determining whether the DSD is defective in response to the executed sequence of commands.

Assignments (8)
PATENT COLLATERAL AGREEMENT - DDTL LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 067045/0156 →
PATENT COLLATERAL AGREEMENT - A&R LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 064715/0001 →
RELEASE OF SECURITY INTEREST AT REEL 038744 FRAME 0481 Recorded Feb 8, 2022
From: JPMORGAN CHASE BANK, N.A.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 058982/0556 →
RELEASE OF SECURITY INTEREST Recorded Mar 5, 2018
From: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 045501/0714 →
SECURITY AGREEMENT Recorded May 17, 2016
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 038744/0281 →
SECURITY AGREEMENT Recorded May 17, 2016
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 038722/0229 →
SECURITY AGREEMENT Recorded May 17, 2016
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 038744/0481 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 19, 2010
From: DALPHY, LAWRENCE J.; STEVENS, CURTIS E.; BLACKBURN, DANIEL K.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 024412/0015 →