IP Library Granted Patent US 7,960,961
Granted Patent B2
US 7,960,961 · App. 12/749,337 · Granted Jun 14, 2011

Bandgap circuit with temperature correction

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Quick Facts
Patent No.
US 7,960,961
App. No.
12/749,337
Granted
Jun 14, 2011
Kind
B2
Abstract

A temperature corrected voltage bandgap circuit is provided. The circuit includes first and second diode connected transistors. A first switched current source is coupled to the one transistor to inject or remove a first current into or from the emitter of that transistor. The first current is selected to correct for curvature in the output voltage of the bandgap circuit at one of hotter or colder temperatures.

Claims (23)

1. A circuit comprising:

a bandgap circuit configured to output a reference voltage;

a first switchable current source coupled to the bandgap circuit and configured to inject a first current into the bandgap circuit to correct the output reference voltage of the bandgap circuit for one of hotter or colder temperatures;

a second switchable current source coupled to the bandgap circuit and configured to remove a second current from the bandgap circuit to correct the output reference voltage of the bandgap circuit for the other of hotter or colder temperatures;

a first transistor, wherein the first switchable current source is coupled to the first transistor and configured to inject the first current into the emitter of the first transistor;

a second transistor, wherein the second switchable current source is coupled to the second transistor and configured to remove the second current from the emitter of the second transistor; and

a resistance network including three trimmable resistors, wherein the resistance network is coupled to the first switchable current source, the second switchable current source, the collectors of the first and second transistors, and the bandgap voltage output node, and wherein the bandgap circuit is configured such that the three trimmable resistors are configured to select the voltages at which the first and second switchable current sources inject and remove current, respectively, into/from the bandgap circuit.

2. The circuit of claim 1 , wherein the first switchable current source is configured to inject the first current into the emitter of the first transistor when the base emitter voltage of the first transistor is at a first predetermined voltage level.

3. The circuit of claim 1 , wherein the second switchable current source is configured to remove the second current from the emitter of the second transistor when the base emitter voltage of the second transistor is at a second predetermined voltage level.

4. A circuit comprising:

a bandgap circuit configured to provide an output reference voltage, wherein the bandgap circuit includes a first transistor and a second transistor;

means for injecting a first current coupled to the first transistor, wherein the means for injecting is configured to inject a first current into the first transistor to correct the output reference voltage of the bandgap circuit for high temperatures; and

means for removing a second current coupled to the second transistor, wherein the means for removing is configured to remove a second current provided to the second transistor to correct the output of the bandgap circuit for low temperatures.

5. The circuit of claim 4 , wherein the means for injecting a first current comprises a first current source, wherein the first current source is further coupled to the emitter of the first transistor, and wherein the first current source is further configured to inject the first current into the emitter of the first transistor.

6. The circuit of claim 5 , wherein the first current source is configured to inject the first current into the emitter of the first transistor in response to a voltage received from the emitter of the first transistor.

7. The circuit of claim 5 , wherein the first current source is configured to inject the first current into the emitter of the first transistor when the base emitter voltage across the first transistor is at a first predetermined voltage level.

8. The circuit of claim 7 , wherein the means for removing a second current comprises a second current source, the circuit further comprises a resistance network coupled to the first current source, the second current source, and the output of the bandgap circuit, wherein the first predetermined voltage level is determined by the resistance network.

9. The circuit of claim 4 , wherein the means for removing a second current comprises a second current source, wherein the second current source is further coupled to the emitter of the second transistor, and wherein the second current source is configured to remove the second current from the emitter of the second transistor.

10. The circuit of claim 9 , wherein the second current source is configured to remove the second current from the emitter of the second transistor in response to a voltage received from the emitter of the second transistor.

11. The circuit of claim 9 , wherein the second current source is configured to remove the second current from the emitter of the second transistor when the base emitter voltage across the second transistor is at a second predetermined voltage level.

12. The circuit of claim 4 , wherein the means for injecting a first current comprises a first current source, wherein the means for removing a second current comprises a second current source, the circuit further comprising a resistance network including a plurality of trimmable resistors coupled to the first current source, the second current source, and the bandgap circuit, and wherein the resistance network is configured to select the voltages at which the first and second current sources inject and remove current, respectively, into/from the bandgap circuit.

13. The circuit of claim 4 , wherein each of the means for injecting a first current and means for removing a second current comprise MOS transistors.

14. The circuit of claim 4 , wherein the means for injecting a first current and the means for removing a second current are formed on a single substrate.

Assignments (3)
MERGER Recorded Dec 22, 2015
From: DOLPAN AUDIO, LLC
To: OL SECURITY LIMITED LIABILITY COMPANY
Reel/Frame 037347/0184 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 25, 2010
From: ANDIGILOG, INC.
To: DOLPAN AUDIO, LLC
Reel/Frame 025191/0546 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 25, 2010
From: CAVE, DAVID
To: ANDIGILOG, INC.
Reel/Frame 025191/0607 →