IP Library Granted Patent US 8,341,337
Granted Patent B1
US 8,341,337 · App. 12/751,696 · Granted Dec 25, 2012

Data storage device booting from system data loaded by host

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Quick Facts
Patent No.
US 8,341,337
App. No.
12/751,696
Granted
Dec 25, 2012
Kind
B1
Abstract

A data storage device (DSD) is disclosed comprising a non-volatile memory (NVM) operable to store system data for accessing the NVM, and a semiconductor memory. Whether to receive the system data from a host is determined prior to attempting to read the system data from the NVM. When the system data is received from the host, the received system data is stored in the semiconductor memory. A command is received from the host to boot the DSD, and the system data is read from the semiconductor memory to boot the DSD.

Claims (69)

1. A data storage device (DSD) connected to a host, the DSD comprising:

a non-volatile memory (NVM) operable to store system data for accessing the non-volatile memory;

a semiconductor memory; and

control circuitry operable to:

determine whether to receive the system data from the host or to read the system data from the NVM, wherein it is determined to receive the system data from the host if the system data stored in the NVM is corrupted or unrecoverable; and

when it is determined to receive the system data from the host:

receive the system data from the host;

store the received system data in the semiconductor memory;

receive a command from the host to boot the DSD; and

read the system data from the semiconductor memory to boot the DSD; and

when it is determined to read the system data from the NVM, read the system data from the NVM to boot the DSD.

2. The data storage device as recited in claim 1 , wherein when it is determined to receive the system data from the host, the control circuitry is further operable to:

store the system data received from the host in a first area of the semiconductor memory; and

read the system data from the first area into a second area of the semiconductor memory.

3. The data storage device as recited in claim 2 , wherein:

the control circuitry implements a RAM-DISK in the first area of the semiconductor memory; and

the control circuitry receives a command from the host to mount the RAM-DISK.

4. The data storage device as recited in claim 3 , wherein when the control circuitry receives an access command to access the system data and the RAM-DISK has been mounted, the control circuitry executes the access command using the RAM-DISK.

5. The data storage device as recited in claim 4 , wherein when the control circuitry receives an access command to access the system data and the RAM-DISK is not mounted, the control circuitry executes the access command using the NVM.

6. The data storage device as recited in claim 1 , wherein the control circuitry is further operable to determine whether the system data should be received from the host by receiving a command from the host.

7. The data storage device as recited in claim 1 , wherein the control circuitry is further operable to determine whether the system data should be received from the host by evaluating a flag.

8. The data storage device as recited in claim 7 , wherein the control circuitry comprises a watchdog timer for setting the flag.

9. The data storage device as recited in claim 1 , wherein the control circuitry is further operable to configure an address translation table in response to the system data, wherein the address translation table maps logical block addresses received from the host to physical block addresses representing memory segments in the NVM.

10. The data storage device as recited in claim 1 , wherein:

the control circuitry is further operable to configure a defect management table in response to the system data; and

the defect management table is used for mapping out defective areas of the NVM.

11. The data storage device as recited in claim 1 , wherein:

the system data comprises operating modules; and

the control circuitry executes code segments of the operating modules in order to access the NVM.

12. The data storage device as recited in claim 1 , wherein the NVM comprises a disk.

13. The data storage device as recited in claim 12 , wherein:

the control circuitry is further operable to configure a write parameter in response to the system data; and

the write parameter is used for writing data to the disk.

14. The data storage device as recited in claim 12 , wherein:

the control circuitry is further operable to configure a read parameter in response to the system data; and

the read parameter is used for reading data from the disk.

15. A method of operating a data storage device (DSD) connected to a host, the DSD comprising a non-volatile memory (NVM) operable to store system data for accessing the NVM, and a semiconductor memory, the method comprising:

determining whether to receive the system data from the host or to read the system data from the NVM, wherein it is determined to receive the system data from the host if the system data stored in the NVM is corrupted or unrecoverable; and

when it is determined to receive the system data from the host:

receiving the system data from the host;

storing the received system data in the semiconductor memory;

receiving a command from the host to boot the DSD; and

reading the system data from the semiconductor memory to boot the DSD; and

when it is determined to read the system data from the NVM, reading the system data from the NVM to boot the DSD.

16. The method as recited in claim 15 , wherein when it is determined to receive the system data from the host, the method further comprises:

storing the system data received from the host in a first area of the semiconductor memory; and

reading the system data from the first area into a second area of the semiconductor memory.

17. The method as recited in claim 16 , wherein:

the first area of the semiconductor memory comprises a RAM-DISK; and

the method further comprises receiving a command from the host to mount the RAM-DISK.

18. The method as recited in claim 17 , wherein when an access command is received to access the system data and the RAM-DISK has been mounted, the method further comprises executing the access command using the RAM-DISK.

19. The method as recited in claim 18 , wherein when an access command is received to access the system data and the RAM-DISK is not mounted, the method further comprises executing the access command using the NVM.

20. The method as recited in claim 15 , further comprising determining whether the system data should be received from the host by receiving a command from the host.

21. The method as recited in claim 15 , further comprising determining whether the system data should be received from the host by evaluating a flag.

22. The method as recited in claim 21 , further comprising setting the flag in accordance with a watchdog timer.

23. The method as recited in claim 15 , further comprising configuring an address translation table in response to the system data, wherein the address translation table maps logical block addresses received from the host to physical block addresses representing memory segments in the NVM.

24. The method as recited in claim 15 , wherein:

the method further comprises configuring a defect management table in response to the system data; and

the defect management table is used for mapping out defective areas of the NVM.

25. The method as recited in claim 15 , wherein:

the system data comprises operating modules; and

the method further comprises executing code segments of the operating modules in order to access the NVM.

26. The method as recited in claim 15 , wherein the NVM comprises a disk.

27. The method as recited in claim 26 , wherein:

the method further comprises configuring a write parameter in response to the system data; and

the write parameter is used for writing data to the disk.

28. The method as recited in claim 26 , wherein:

the method further comprises configuring a read parameter in response to the system data; and

the read parameter is used for reading data from the disk.

Assignments (7)
PATENT COLLATERAL AGREEMENT - DDTL LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 067045/0156 →
PATENT COLLATERAL AGREEMENT - A&R LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 064715/0001 →
RELEASE OF SECURITY INTEREST AT REEL 038744 FRAME 0481 Recorded Feb 8, 2022
From: JPMORGAN CHASE BANK, N.A.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 058982/0556 →
RELEASE OF SECURITY INTEREST Recorded Mar 5, 2018
From: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 045501/0714 →
SECURITY AGREEMENT Recorded May 17, 2016
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 038722/0229 →
SECURITY AGREEMENT Recorded May 17, 2016
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 038744/0281 →
SECURITY AGREEMENT Recorded May 17, 2016
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 038744/0481 →