IP Library Granted Patent US 8,168,547
Granted Patent B2
US 8,168,547 · App. 12/752,828 · Granted May 1, 2012

Manufacturing method of semiconductor device

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Quick Facts
Patent No.
US 8,168,547
App. No.
12/752,828
Granted
May 1, 2012
Kind
B2
Abstract

The transistor characteristics of a MIS transistor provided with a gate insulating film formed to contain oxide with a relative dielectric constant higher than that of silicon oxide are improved. After a high dielectric layer made of hafnium oxide is formed on a main surface of a semiconductor substrate, the main surface of the semiconductor substrate is heat-treated in a non-oxidation atmosphere. Next, an oxygen supplying layer made of hafnium oxide deposited by ALD and having a thickness smaller than that of the high dielectric layer is formed on the high dielectric layer, and a cap layer made of tantalum nitride is formed. Thereafter, the main surface of the semiconductor substrate is heat-treated.

Claims (54)

1. A manufacturing method of a semiconductor device comprising steps of:

before the step (a), forming a silicon oxide film over the semiconductor substrate;

(a) forming a first layer over a semiconductor substrate;

(b) after the step (a), forming a second layer over the first layer; and

(c) after the step (b), forming a cap layer over the second layer,

wherein the first and second layers compose a gate insulating film of a MIS transistor,

wherein the cap layer composes a gate electrode of the MIS transistor,

wherein the first layer includes Hf and O,

wherein the second layer includes either Al and O or Ta and O,

wherein a thickness of the second layer is smaller than a thickness of the first layer,

wherein a thickness of the silicon oxide film is smaller than a thickness of the first layer, and

wherein a thickness of the second layer is smaller than a thickness of the silicon oxide film.

2. A manufacturing method of a semiconductor device according to claim 1 ,

wherein, in the step (b), the second layer is formed by ALD method.

3. A manufacturing method of a semiconductor device according to claim 1 ,

wherein, in the step (a), the first layer is formed by ALD method.

4. A manufacturing method of a semiconductor device according to claim 1 ,

wherein the cap layer is made of a metal film.

5. A manufacturing method of a semiconductor device according to claim 1 ,

wherein the MIS transistor is an n-channel MIS transistor, and

wherein the cap layer is made of a tantalum nitride film, an aluminum film, a titanium film, or a tantalum film.

6. A manufacturing method of a semiconductor device according to claim 1 ,

wherein the MIS transistor is a p-channel MIS transistor, and

wherein the cap layer is made of a ruthenium film, a platinum film, or a nickel film.

7. A manufacturing method of a semiconductor device according to claim 1 , further comprising a step of:

(d) between the step (a) and (b), heat-treating a main surface of the semiconductor substrate in a non-oxidation atmosphere.

8. A manufacturing method of a semiconductor device according to claim 7 ,

wherein the first layer is densified by the step (d).

9. A manufacturing method of a semiconductor device according to claim 8 ,

wherein, in the step (b), the second layer has an oxygen proportion higher than that in the first layer just after the step (e).

10. A manufacturing method of a semiconductor device according to claim 1 , further comprising a step of:

(e) after the step (c), heat-treating a main surface of the semiconductor substrate.

11. A manufacturing method of a semiconductor device according to claim 10 ,

wherein oxygen is supplied from the second layer to the first layer by the step (e).

12. A semiconductor device comprising:

a first layer formed over a semiconductor substrate;

a second layer formed over the first layer;

a cap layer formed over the second layer; and

a silicon oxide film disposed between the semiconductor substrate and the first layer,

wherein the first and second layers compose a gate insulating film of a MIS transistor,

wherein the cap layer composes a gate electrode of the MIS transistor,

wherein the first layer includes Hf and O,

wherein the second layer includes either Al and O or Ta and O,

wherein a thickness of the second layer is smaller than a thickness of the first layer, and

wherein a thickness of the silicon oxide film is smaller than a thickness of the first layer, and

wherein a thickness of the second layer is smaller than a thickness of the silicon oxide film.

13. A semiconductor device according to claim 12 ,

wherein the cap layer is made of a metal film.

14. A semiconductor device according to claim 12 ,

wherein the MIS transistor is an n-channel MIS transistor, and

wherein the cap layer is made of a tantalum nitride film, an aluminum film, a titanium film, or a tantalum film.

15. A semiconductor device according to claim 12 ,

wherein the MIS transistor is a p-channel MIS transistor, and

wherein the cap layer is made of a ruthenium film, a platinum film, or a nickel film.

Assignments (3)
CHANGE OF ADDRESS Recorded Nov 29, 2017
From: RENESAS ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 044928/0001 →
MERGER Recorded Sep 1, 2010
From: RENESAS TECHNOLOGY CORP.
To: NEC ELECTRRONICS CORPORATION
Reel/Frame 024933/0869 →
CHANGE OF NAME Recorded Sep 1, 2010
From: NEC ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 024953/0404 →