Watchdog timer with mode dependent time out

1. A method, comprising:

operating a watchdog timer having a first time out period in a processing system;

receiving an indication of a change in a mode of operation in the processing system, wherein the change of mode of the processing system comprises a change in operating frequency;

changing the first time out period of the watchdog timer to a second time out period in response to the change in the mode of operation, wherein the first time out period is different than the second time out period; and

in response to an expiration of the second time out period, providing a reset signal to the processing system.

2. The method of claim 1 , wherein the watchdog timer having a first timeout period comprises a counter having a first time out value.

3. The method of claim 1 , wherein changing the first time out period of the watchdog timer comprises storing a second time out value in the counter of the watchdog timer.

4. The method of claim 1 , wherein changing the first time out period of the watchdog timer comprises disabling the watchdog timer in response to the change in the mode of operation.

5. The method of claim 1 , further comprising:

receiving a watchdog timer feed signal; and

changing the first time out period to the second time out period upon receiving the watchdog timer feed signal.

6. The method of claim 5 , further comprising:

restarting the second time out period with the second time out value.

7. The method of claim 6 , further comprising:

receiving a key along with the watchdog timer feed signal;

unlocking the watchdog timer for a predetermined period of time; and

locking the watchdog timer after the predetermined period of time has passed.

8. The method of claim 7 , further comprising:

returning a success code indicating that the time out period was successfully restarted.

9. The method of claim 1 , wherein changing the first time out period to a second time out period is performed by the watchdog timer.

10. The method of claim 1 , further comprising providing a reset signal to the processing system upon expiration of the first time out period when the processing system is in a first mode of operation.

11. An apparatus, comprising:

a processing system; and

a watchdog timer circuit coupled to the processing system, the watchdog timer circuit configured to change a time out period from a first time out period to a second time out period in response to a change in a mode of operation of the processing system,

wherein the change in mode of operation of the processing system comprises a change in operating frequency; and

wherein the first time out period is different than the second time out period, and, in response to an expiration of the second time out period, provide a reset signal to the processing system.

12. The apparatus of claim 11 , wherein the watchdog timer comprises a counter to store a first time out value corresponding to the first time out period.

13. The apparatus of claim 12 , wherein when the watchdog timer changes the time out period, the watchdog timer stores a second time out value in the counter.

14. The apparatus of claim 11 , wherein the watchdog timer circuit comprises a watchdog timer control circuit configured to:

receive a watchdog timer feed signal; and

change the time out period of the watchdog timer circuit upon receiving the watchdog timer feed signal.

15. The apparatus of claim 11 , further comprising:

a protection circuit coupled to the watchdog timer circuit, the protection circuit configured to:

receive a key indicating a request to modify a stored time out value;

unlock the watchdog timer for a predetermined period of time; and

lock the watchdog timer after the predetermined period of time has passed.

16. The apparatus of claim 15 , wherein the protection circuit is further configured to:

return a success code indicating that the stored time out value was successfully modified.

17. The apparatus of claim 11 , further comprising:

a mode control circuit configured to detect the change in the mode of operation of the processing system.

18. The apparatus of claim 11 , wherein the watchdog timer circuit comprises:

a time out options storage register to store one or more time out values corresponding to one or more modes of operation of the processing system.

19. An apparatus comprising:

a processing system;

a watchdog timer circuit coupled to the processing system;

a first circuit configured to change a time out period of the watchdog timer circuit from a first time out period to a second time out period in response to a change in a mode of operation of the processing system, wherein the first time out period is different than the second time out period;

a second circuit configured to reset signal to the processing system in response to an expiration of the second time out period,

wherein the change in mode of operation of the processing system comprises a change in operating frequency.

20. The apparatus of claim 19 , wherein the circuit configured to change the time out value is further configured to operate during active operation of the processing system.