DISPLAY DEVICE
A control electrode of j (1≦j≦N−1)th transistor is connected to gate lines of (j+1)th group. A scanning line drive circuit outputs a first selection scanning voltage selecting scanning lines within each of groups for every 1 horizontal scanning period to gate lines of k 1 gate line of a first group, outputs a second selection scanning voltage for selecting scanning lines in one group out of groups at a second stage where a group including k 1 scanning lines is set as 1 unit for every k 1 horizontal scanning period to k 2 gate lines of a second group, and outputs (m+1)th selection scanning voltage for selecting the scanning lines in one group out of the groups at (m+1)th stage where a group including km scanning lines is set as 1 unit for every (km× . . . ×k 1 ) horizontal scanning period to gate lines of (m+1)th group having k(m+1) (2≦m≦N−1) gate lines.
1 . A display device comprising:
a plurality of pixels;
a plurality of scanning lines configured to input a scanning voltage to the plurality of pixels; and
a scanning line drive circuit configured to supply the scanning voltage to the plurality of scanning lines,
wherein the scanning lines are divided into kN× . . . ×k 2 groups assuming N as an integer of 2 or more, wherein the number of the scanning lines in each of the groups is k 1 at maximum,
wherein n as an integer not less than 1 and not more than N, j as an integer not less than 1 and not more than N−1, and m as an integer not less than 2 and not more than N−1 or less,
wherein the display device further comprises:
a first gate line group to an Nth gate line group of gate lines, wherein each of the first gate line group to the Nth gate line group of the gate lines include kn (1≦n≦N) gate lines respectively; and
series circuits having (N−1) transistors ranging from a first transistor to a (N−1)th transistor,
wherein each of the (N−1) transistors is provided for each of the scanning lines,
wherein one end of each of the scanning lines is connected to a second electrode of the (N−1)th transistor,
wherein a first electrode of the first transistor is connected to any one of the gate lines of the first gate line group,
wherein a control electrode of the j (1≦j≦N−1)th transistor is connected to any one of the gate lines of the (j+1)th gate line group,
wherein the scanning line drive circuit outputs a first selection scanning voltage for selecting the scanning lines within each of the groups for every 1 horizontal scanning period to the gate lines of the first gate line group including k 1 gate lines,
wherein the scanning line drive circuit outputs a second selection scanning voltage for selecting the scanning lines in one second group out of second groups where the group including k 1 scanning lines is set as 1 unit for every k 1 horizontal scanning periods to the gate lines of the second gate line group including k 2 gate lines, and
wherein the scanning line drive circuit outputs the (m+1)th selection scanning voltage for selecting the scanning lines in one (m+1)th group out of (m+1)th groups where a mth group including km scanning lines is set as 1 unit for every (km× . . . ×k 1 ) horizontal scanning periods to the gate lines of the (m+1)th gate line group having k(m+1) (2≦m≦N−1) gate lines.
2 . The display device according to claim 1 , wherein assuming p as an integer not less than 2 and not more than N, a difference between k(p−1) and kp(2≦p≦N) is set to N or less.
3 . The display device according to claim 1 , wherein the selection scanning voltage is outputted to all the gate lines of the second gate line group to the Nth gate line group from the scanning line drive circuit, and
wherein a non-selection scanning voltage is outputted to all the gate lines of the first gate line group within a period T 1 at the beginning of said each horizontal scanning period.
4 . The display device according to claim 3 , wherein the scanning line drive circuit, after a lapse of the period T 1 , outputs a non-selection scanning voltage to the gate lines other than the gate lines to which the second to the Nth selection scanning voltages are outputted out of the gate lines of the second gate line group to the Nth gate line group, and
wherein the scanning line drive circuit, after a lapse of a period T 2 which continuously follows the period T 1 , outputs the first selection scanning voltage to the gate lines selected out of the gate lines of the first gate line group.
5 . The display device according to claim 1 , wherein a video line drive circuit and the scanning line drive circuit are formed of the same semiconductor chip.
6 . The display device according to claim 1 , wherein each of the plurality of pixeles includes a thin film transistor which is an active element, and
wherein a semiconductor layer of the thin film transistor is formed of an amorphous silicon layer.
7 . The display device according to claim 6 , wherein the semiconductor layer of the (N−1) transistors ranging from the first transistor to the (N−1)th transistor is formed of an amorphous silicon layer.
8 . The display device according to claim 1 , wherein each of the plurality of the pixeles includes a thin film transistor which is an active element, and
wherein a semiconductor layer of the thin film transistor is formed of a micro-crystalline silicon layer.
9 . The display device according to claim 8 , wherein the semiconductor layer of the (N−1) transistors ranging from the first transistor to the (N−1)th transistor is formed of a micro-crystalline silicon layer.