Timing controller utilized in display device and method thereof

1. A timing controller, configured for controlling a driving circuit coupled to a display panel provided with a luminance characteristic and a pixel arrangement, and processing an image signal provided with image data and a synchronous signal, comprising:

an image processing circuit, for processing image data;

a luminance adjusting circuit, for adjusting the processed image data according to the luminance characteristic and generating an adjusted image data;

a data converting circuit comprising a buffer selecting unit configured to select either a first scan line buffer or a second scan line buffer, for converting the adjusted image data to a display data provided for the driving circuit according to the pixel arrangement; and

a driving signal generating circuit, for generating a driving signal to control the driving circuit according to the synchronous signal;

wherein the display panel is built in a notebook; and

wherein the first scan line buffer is configured for storing adjusted image data for a left half of the display panel and the second scan line buffer is configured for storing adjusted image data for a right half of the display panel.

2. The timing controller as claimed in claim 1 , further comprising:

a backlight control circuit, for generating a backlight control signal to control a backlight module of the display panel according to the image data.

3. The timing controller as claimed in claim 2 , wherein the backlight control circuit comprises:

a luminance converting unit, for generating a luminance signal corresponding to the image data;

a luminance distribution unit, for analyzing the luminance signal to generate a luminance distribution signal; and

a control unit, for generating the backlight control signal according to the luminance distribution signal.

4. The timing controller as claimed in claim 1 , further comprising:

a frame rate control circuit, coupled between the luminance adjusting circuit and the data converting circuit, for performing frame rate control processing on the adjusted image data;

wherein, the data converting circuit converts the adjusted image data processed by the frame rate control circuit to the display data.

5. The timing controller as claimed in claim 1 , wherein the image processing circuit comprises:

a sharpness adjusting unit, for adjusting sharpness of the image data.

6. The timing controller as claimed in claim 1 , wherein the display panel is a liquid crystal display (LCD) device.

7. The timing controller as claimed in claim 1 , wherein the image processing circuit comprises:

a six-axis color adjusting unit, for performing a six-axis color adjustment on the image data.

8. A timing control and image processing method, performed for controlling a driving circuit coupled to a display panel provided with a luminance characteristic and a pixel arrangement, and processing an image signal provided with image data and a synchronous signal, comprising:

performing image processing on the image data;

adjusting luminance of the processed image data according to the luminance characteristic;

converting the adjusted image data to display data provided for the driving circuit according to the pixel arrangement and a buffer selection;

generating a driving signal to control the driving circuit according to the synchronous signal; and

generating a backlight control signal to control a backlight module of the display panel according to the image data;

wherein the display panel is built in a notebook;

wherein the buffer selection further comprises selecting either a first scan line buffer or a second scan line buffer, and the first scan line buffer is configured for storing adjusted image data for a first half of the display panel and the second scan line buffer is configured for storing adjusted image data for a second half of the display panel; and

wherein generating the backlight control signal to control the backlight module of the display panel comprises:

generating a luminance signal corresponding to the image data;

analyzing the luminance signal to generate a luminance distribution signal; and

generating the backlight control signal according to the luminance distribution signal.

9. The method as claimed in claim 8 , further comprising:

performing frame rate control processing on the adjusted image data to generate frame rate processed image data; and

wherein, the step of converting the adjusted image data to the display data further comprises:

converting the frame rate processed image data to the display data.

10. The method as claimed in claim 8 , wherein the step of performing image processing on the image data comprises:

adjusting sharpness of the image data.

11. The method as claimed in claim 8 , wherein the display panel is an LCD device.

12. The method as claimed in claim 8 , wherein the step of performing image processing on the image data comprises:

performing a six-axis color adjustment on the image data.

13. A timing controller, configured for controlling a driving circuit and a backlight module which are coupled to a display panel provided with a luminance characteristic and a pixel arrangement, and processing an image signal provided with image data and a synchronous signal, comprising:

a backlight control circuit, for generating a backlight control signal to the backlight module according to the image data;

an image processing circuit, for processing image data;

a luminance adjusting circuit, for adjusting the image data according to the luminance characteristic;

a data converting circuit comprising a buffer selecting unit configured to select either a first scan line buffer or a second scan line buffer, for converting the adjusted image data to display data provided for the driving circuit according to the pixel arrangement; and

a driving signal generating circuit, for generating a driving signal to control the driving circuit according to the synchronous signal;

wherein the display panel is built in a notebook;

wherein the first scan line buffer is configured for storing adjusted image data for a first half of the display panel and the second scan line buffer is configured for storing adjusted image data for a second half of the display panel; and

wherein the backlight control circuit comprises:

a luminance converting unit, for generating a luminance signal corresponding to the image data;

a luminance distribution unit, for analyzing the luminance signal to generate a luminance distribution signal; and

a control unit, for generating the backlight control signal according to the luminance distribution signal.