Thin film solar cell with ceramic handling layer
A method for fabricating a photovoltaic (PV) cell panel wherein all PV cells are formed simultaneously on a two-dimensional array of monocrystalline silicon mother wafers affixed to a susceptor is disclosed. Porous silicon separation layers are anodized in the surfaces of the mother wafers. The porous film is then smoothed to form a suitable surface for epitaxial film growth. An epitaxial reactor is used to grow n- and p-type films forming the PV cell structures. A glass/ceramic handling layer is then formed on the PV cell structures. The PV cell structures with handling layers are then exfoliated from the mother wafer. The array of mother wafers may be reused multiple times, thereby reducing materials costs for the completed solar panels. The glass/ceramic handling layers provide structural integrity to the thin epitaxial solar cells during the separation process and subsequent handling.
1. A method of fabricating a solar cell comprising:
forming a stack of thin continuous epitaxial solar cell layers on a silicon wafer;
forming a handling layer on said stack, wherein said handling layer includes electrical contacts to said stack and wherein said handling layer has a waffle-shaped structure with an array of circular apertures;
forming a common electrode over said handling layer connecting to back side electrical contacts of said solar cell, wherein said array of circular apertures coincide with said back side electrical contacts of said solar cell; and
separating said stack from said silicon wafer, wherein said stack remains attached to said handling layer.
2. The method as in claim 1 , wherein said stack has a thickness in the range of 1 to 100 microns.
3. The method as in claim 2 , wherein said stack has a thickness in the range of 25 to 50 microns.
4. The method as in claim 1 , wherein said stack comprises a p-type layer.
5. The method as in claim 1 , wherein said stack comprises a n-type layer.
6. The method as in claim 1 , wherein said silicon wafer includes a porous silicon surface layer and said separating includes applying a separating force to fracture said porous silicon layer.
7. The method as in claim 1 , wherein said silicon wafer is selected from the group consisting of a polycrystalline silicon wafer and a single crystal silicon wafer.
8. The method as in claim 1 , wherein said thin continuous epitaxial solar cell layers include a layer selected from the group consisting of a silicon-germanium layer, a silicon carbide layer, a gallium nitride layer and a silicon layer.
9. The method as in claim 1 , wherein said handling layer comprises a material selected from the group consisting of glass, glass-bonded ceramic and glass-ceramic.
10. The method as in claim 9 , wherein said handling layer comprises cordierite glass-ceramic.
11. The method as in claim 9 , wherein said handling layer has a thickness in the range of 5 to 1000 microns.
12. The method as in claim 9 , wherein said handling layer has a thickness in the range of 250 to 500 microns.
13. The method as in claim 1 , wherein said handling layer has a coefficient of thermal expansion greater than or equal to the coefficient of thermal expansion of said stack over a temperature range from ambient temperatures to a maximum temperature, said maximum temperature being the highest temperature reached during said forming said handling layer.
14. The method as in claim 1 , wherein said handling layer has a coefficient of thermal expansion in the range from 5% less than to 25% greater than the coefficient of thermal expansion of said stack over a temperature range from ambient temperatures to a maximum temperature, said maximum temperature being the highest temperature reached during said forming said handling layer.
15. The method as in claim 1 , wherein said forming said handling layer includes:
depositing a powder; and
sintering said powder.
16. The method as in claim 15 , wherein said powder comprises ceramic powder and glass powder.
17. The method as in claim 15 , wherein said powder is a powder paste.
18. The method as in claim 15 , wherein said depositing is nozzle dispensing.
19. The method as in claim 18 , wherein said nozzle dispensing is dispensing from multiple nozzles simultaneously.
20. The method as in claim 15 , wherein said powder is green tape.
21. The method as in claim 20 , wherein said green tape has preformed openings.
22. The method as in claim 21 , further comprising, before said sintering, filling said preformed openings with a metal paste.
23. The method as in claim 15 , wherein said sintering is firing in a temperature controlled furnace.
24. The method as in claim 15 , further comprising, after said sintering, forming vias in said handling layer.
25. The method as in claim 24 , wherein said forming said vias includes laser drilling.
26. The method as in claim 24 , further comprising, after forming said vias, filling said vias with electrically conductive material.
27. The method as in claim 1 , further comprising, before said forming said handling layer on said stack, forming a boundary layer on said stack.
28. The method as in claim 27 , wherein the interface between said handling layer and said boundary layer reflects visible light passing through said stack back into said stack.
29. The method as in claim 27 , wherein said boundary layer is selected from the group consisting of a silicon oxide layer, a silicon nitride layer and an alumina layer.
30. The method as in claim 29 , wherein said boundary layer has a thickness greater than 20 nanometers.
31. The method as in claim 29 , wherein said boundary layer has a thickness in the range of 30 to 100 nanometers.
32. The method as in claim 1 , further comprising, after said separating:
etching the surface of said stack opposite to said handling layer to form a textured surface; and
forming an antireflection coating over said textured surface.
33. The method as in claim 1 , further comprising, before said forming said handling layer on said stack, forming electrical contacts on the surface of said stack.
34. The method as in claim 1 , wherein said handling layer reflects back into said stack visible light passing through said stack towards said handling layer.
35. The method as in claim 1 , wherein said handling layer has a waffle-shaped structure with a first set of parallel ridges and a second set of parallel ridges, said first set of parallel ridges being perpendicular to said second set of parallel ridges.
36. The method as in claim 35 , wherein said handling layer is formed by a process including depositing a paste by nozzle dispensing to form said first set of parallel ridges on the surface of said stack, followed by depositing said second set of parallel ridges on the surface of said stack, said second set of parallel ridges being perpendicular to said first set of parallel ridges.
37. The method as in claim 35 , wherein said silicon wafer is a single crystal silicon wafer and said stack of thin continuous epitaxial solar cell layers is a stack of single crystal solar cell layers.
38. The method as in claim 1 , wherein said forming said common electrode includes depositing aluminum over said handling layer.
39. A method of fabricating a solar cell comprising:
forming a stack of thin continuous epitaxial solar cell layers on a silicon wafer, wherein said silicon wafer is a single crystal silicon wafer and said stack of thin continuous epitaxial solar cell layers is a stack of single crystal epitaxial silicon solar cell layers;
forming a handling layer on said stack, wherein said handling layer includes electrical contacts to said stack and said handling layer has a waffle-shaped structure with a first set of parallel ridges and a second set of parallel ridges, said first set of parallel ridges being perpendicular to said second set of parallel ridges, and wherein at least one of said first and second sets of parallel ridges are aligned at a small angle to a cleavage plane of said stack of single crystal epitaxial silicon solar cell layers; and
separating said stack from said silicon wafer, wherein said stack remains attached to said handling layer.
40. The method as in claim 39 , wherein said cleavage plane is the 100 family of planes.
41. The method as in claim 39 , wherein said small angle is in the range between 3 and 10 degrees.
42. The method as in claim 39 , wherein said handling layer includes an array of roughly square apertures.
43. The method as in claim 42 , wherein the square apertures are between 500 microns and 2 millimeters on a side.
44. The method as in claim 43 , wherein the spacing of said square apertures in said array is greater than or equal to twice the width of said square apertures.
45. The method as in claim 39 , wherein said silicon wafer includes a porous silicon surface layer and said separating includes applying a separating force to fracture said porous silicon layer.
46. The method as in claim 39 , wherein said handling layer comprises a material selected from the group consisting of glass, glass-bonded ceramic and glass-ceramic.
47. The method as in claim 39 , wherein said handling layer has a coefficient of thermal expansion in the range from 5% less than to 25% greater than the coefficient of thermal expansion of said stack over a temperature range from ambient temperatures to a maximum temperature, said maximum temperature being the highest temperature reached during said forming said handling layer.
48. The method as in claim 39 , wherein said forming said handling layer includes nozzle dispensing a powder paste and sintering said powder paste.
49. The method as in claim 39 , further comprising, before said forming said handling layer on said stack, forming a boundary layer on said stack.
50. The method as in claim 49 , wherein said boundary layer is selected from the group consisting of a silicon oxide layer, a silicon nitride layer and an alumina layer.
51. A method of fabricating a solar cell comprising:
forming a stack of thin continuous epitaxial solar cell layers on a silicon wafer;
forming a handling layer on said stack, wherein said handling layer includes electrical contacts to said stack and wherein said handling layer has a waffle-shaped structure with an array of circular apertures;
forming first parallel electrode fingers over said handling layer connecting to first electrical contacts for collector regions of said solar cell;
forming second parallel electrode fingers over said handling layer connecting to second electrical contacts for emitter regions of said solar cell; and
separating said stack from said silicon wafer, wherein said stack remains attached to said handling layer;
wherein said first parallel electrode fingers and said second parallel electrode fingers are parallel to each other, and wherein a first portion of said array of circular apertures coincide with said first electrical contacts for collector regions of said solar cell, and a second portion of said array of circular apertures coincide with second electrical contacts for emitter regions of said solar cell.
52. The method as in claim 51 , wherein said silicon wafer includes a porous silicon surface layer and said separating includes applying a separating force to fracture said porous silicon layer.
53. The method as in claim 51 , wherein said handling layer comprises a material selected from the group consisting of glass, glass-bonded ceramic and glass-ceramic.
54. The method as in claim 51 , wherein said handling layer has a coefficient of thermal expansion in the range from 5% less than to 25% greater than the coefficient of thermal expansion of said stack over a temperature range from ambient temperatures to a maximum temperature, said maximum temperature being the highest temperature reached during said forming said handling layer.
55. The method as in claim 51 , wherein said forming said handling layer includes nozzle dispensing a powder paste and sintering said powder paste.
56. The method as in claim 51 , further comprising, before said forming said handling layer on said stack, forming a boundary layer on said stack.
57. The method as in claim 56 , wherein said boundary layer is selected from the group consisting of a silicon oxide layer, a silicon nitride layer and an alumina layer.