IP Library Granted Patent US 8,971,531
Granted Patent B2
US 8,971,531 · App. 12/770,466 · Granted Mar 3, 2015

Data embedding system

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Quick Facts
Patent No.
US 8,971,531
App. No.
12/770,466
Granted
Mar 3, 2015
Kind
B2
Abstract

A system and method for embedding data is provided. The method comprises dividing the host data set into a plurality of blocks, wherein each block comprises a plurality of elements, generating a pattern connecting the elements of each block; and embedding data on the elements of block based on the pattern.

Claims (37)

1. A method comprising:

dividing, by a computer-based system, a host data set into a plurality of blocks,

wherein a block of the plurality of blocks comprises a plurality of pixels, each pixel having an odd or even number position;

shuffling the plurality of pixels in the block having the odd number position according to a first shuffling scheme;

shuffling the plurality of pixels in the block having the even number position according to a second shuffling scheme;

generating, by the computer-based system, a pattern connecting the plurality of pixels in the block at least once to embed data; and

responsive to the generating the pattern:

embedding, by the computer-based system, data in a least significant bit of each pixel of the plurality of pixels in the block based on the pattern,

altering the least significant bit of each pixel of the plurality of pixels in the block in response to a binary value of the data differing from a value of the least significant bit, and

transmitting, by the computer-based system, the pattern to a hardware receiving device.

2. The method of claim 1 , further comprising transmitting, by the computer-based system, the host data set to the hardware receiving device.

3. The method of claim 1 , further comprising:

receiving, by the computer-based system, the host data set and a pattern code;

determining, by the computer-based system, the pattern based on the pattern code; and

applying, by the computer-based system, the pattern to the host data set to extract the embedded data from the divided host data set.

4. A computing device comprising:

a hardware transmitting device configured to:

divide a host data set into a plurality of blocks, wherein a block of the plurality of blocks comprises a plurality of pixels, each pixel having an odd or even number position;

shuffle the plurality of pixels in the block having the odd number position according to a first shuffling scheme;

shuffle the plurality of pixels in the block having the even number position according to a second shuffling scheme;

generate a pattern connecting the plurality of pixels in the block at least once to embed data; and

responsive to the pattern generation:

embed data in a least significant bit of each pixel of the plurality of pixels in the block based on the pattern,

alter the least significant bit of each pixel of the plurality of pixels in the block in response to a binary value of the data differing from a value of the least significant bit, and

transmit the pattern to a hardware receiving device.

5. The computing device of claim 4 , wherein the hardware receiving device is configured to:

receive the host data set, the first and second shuffling scheme and a pattern code;

determine the pattern based on the pattern code and the first and second shuffling scheme; and

apply the pattern to the host data set to extract the embedded data from the host data set.

6. A computing device comprising:

a hardware receiving device configured to:

receive a host data set and a pattern code;

determine a pattern based on the pattern code, the pattern connecting a plurality of pixels in a block at least once to embed data, each pixel of the plurality of pixels having an odd or even number position,

wherein the plurality of pixels having the odd number position are shuffled according to a first shuffling scheme, and

wherein the plurality of pixels having the even number position are shuffled according to a second shuffling scheme;

apply the pattern to the host data set to extract embedded data from a least significant bit of each pixel that the pattern connects in the block; and

recover the embedded data.

Assignments (4)
RELEASE OF SECURITY INTEREST IN PATENTS, RECORDED ON JANUARY 29, 2019 AT REEL 048373 FRAME 0217 Recorded Sep 22, 2025
From: CRESTLINE DIRECT FINANCE, L.P., AS COLLATERAL AGENT
To: EMPIRE TECHNOLOGY DEVELOPMENT LLC
Reel/Frame 072936/0464 →
RELEASE OF SECURITY INTEREST Recorded Jul 31, 2019
From: CRESTLINE DIRECT FINANCE, L.P.
To: EMPIRE TECHNOLOGY DEVELOPMENT LLC
Reel/Frame 049924/0794 →
SECURITY INTEREST Recorded Jan 29, 2019
From: EMPIRE TECHNOLOGY DEVELOPMENT LLC
To: CRESTLINE DIRECT FINANCE, L.P.
Reel/Frame 048373/0217 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 29, 2010
From: AMIRTHARAJAN, RENGARAJAN; BALAGURU R, JOHN BOSCO
To: SASTRA UNIVERSITY
Reel/Frame 024313/0390 →