Superlattice device, manufacturing method thereof, solid-state memory including superlattice device, data processing system, and data processing device
To include a superlattice laminate having laminated thereon a first crystal layer of which crystal lattice is a cubic crystal and in which positions of constituent atoms are reversibly replaced by application of energy, and a second crystal layer having a composition different from that of the first crystal layer, and an orientation layer that is an underlaying layer of the superlattice laminate and causes a laminated surface of the first crystal layer to be (111)-orientated. According to the present invention, the laminated surface of the first crystal layer can be (111)-orientated by using the orientation layer as an underlaying layer. In the first crystal layer of which laminated surface is (111)-orientated, a crystal structure reversibly changes when a relatively low energy is applied. Therefore, characteristics of a superlattice device having this crystal layer can be enhanced.
1. A superlattice device comprising:
a superlattice laminate including first and second crystal layers laminated to each other, the first crystal layer having a cubic crystal in which positions of constituent atoms are reversibly replaced by application of energy, the second crystal layer having a composition different from that of the first crystal layer; and
an orientation layer that is an underlaying layer of the superlattice laminate and causes a laminated surface of the first crystal layer to be (111)-orientated.
2. The superlattice device as claimed in claim 1 , wherein a crystal lattice of the first crystal layer is an NaCl-type cubic lattice.
3. The superlattice device as claimed in claim 2 , wherein the first crystal layer comprises a chalcogen compound having germanium (Ge) as a main component.
4. The superlattice device as claimed in claim 3 , wherein the first crystal layer comprises a chalcogen compound having germanium (Ge) and tellurium (Te) as main components.
5. The superlattice device as claimed in claim 4 , wherein the first crystal layer comprises a chalcogen compound having germanium (Ge) and tellurium (Te) at a ratio of 1:1, and a crystal structure of the first crystal layer reversibly changes between a first crystal structure in which one germanium atom is orientated to four tellurium atoms and a second crystal structure in which one germanium atom is orientated to six tellurium atoms, based on a movement of a germanium atom by application of energy.
6. The superlattice device as claimed in claim 1 , wherein at least a portion in contact with the first crystal layer out of the orientation layer has a hexagonal crystal, and a c-axis thereof is orientated to a laminated direction.
7. The superlattice device as claimed in claim 6 , wherein the orientation layer comprises antimony (Sb) or a chalcogen compound having antimony (Sb) as a main component.
8. The superlattice device as claimed in claim 7 , wherein the orientation layer comprises a chalcogen compound having antimony (Sb) and tellurium (Te) as main components.
9. The superlattice device as claimed in claim 8 , wherein a thickness of the orientation layer is equal to or larger than 5 nm.
10. The superlattice device as claimed in claim 1 , wherein a crystal lattice of the second crystal layer is a hexagonal crystal, and a c-axis thereof is orientated to a laminated direction.
11. The superlattice device as claimed in claim 10 , wherein the second crystal layer comprises a chalcogen compound having antimony (Sb) as a main component.
12. The superlattice device as claimed in claim 11 , wherein the second crystal layer comprises a chalcogen compound having antimony (Sb) and tellurium (Te) as main components.
13. The superlattice device as claimed in claim 1 , wherein the second crystal layer has a same composition as that of the orientation layer.
14. The superlattice device as claimed in claim 1 , wherein the superlattice laminate has a structure having the first crystal layer and the second crystal layer alternately laminated at plural times.
15. The superlattice device as claimed in claim 14 , wherein each of the first crystal layers is configured by a crystal lattice of one layer.
16. The superlattice device as claimed in claim 1 , further comprising first and second electrodes provided to sandwich the superlattice laminate in a laminated direction.
17. The superlattice device as claimed in claim 16 , further comprising:
a write circuit that moves a position of a constituent atom of the first crystal layer by flowing a write current to the superlattice laminate via the first and second electrodes; and
a read circuit that flows a read current to the superlattice laminate via the first and second electrodes without moving a position of a constituent atom of the first crystal layer.
18. The superlattice device as claimed in claim 17 , wherein the write circuit includes a set circuit that causes the first crystal layer to change from a first crystal structure to a second crystal structure, and a reset circuit that causes the first crystal layer to change from the second crystal structure to the first crystal structure.
19. A solid-state memory comprising:
a plurality of word lines;
a plurality of bit lines that intersect with the word lines; and
a plurality of memory cells arranged at intersections between the word lines and the bit lines,
wherein each of the memory cells comprises:
a superlattice laminate including first and second crystal layers laminated to each other, the first crystal layer having a cubic crystal in which positions of constituent atoms are reversibly replaced by application of energy, the second crystal layer having a composition different from that of the first crystal layer; and
an orientation layer that is an underlaying layer of the superlattice laminate and causes a laminated surface of the first crystal layer to be (111)-orientated.
20. A data processing system comprising:
a solid-state memory;
a data processor; and
a system bus that connects the solid-state memory and the data processor,
wherein the solid-state memory includes a memory cell, the memory cell comprises:
a superlattice laminate including first and second crystal layers laminated to each other, the first crystal layer having a cubic crystal in which positions of constituent atoms are reversibly replaced by application of energy, the second crystal layer having a composition different from that of the first crystal layer; and
an orientation layer that is an underlaying layer of the superlattice laminate and causes a laminated surface of the first crystal layer to be (111)-orientated.
21. A solid-state memory comprising:
a data-rewritable user area; and
a defective-address memory circuit that stores a defective address included in the user area,
wherein the defective-address memory circuit includes a memory cell, the memory cell comprises:
a superlattice laminate including first and second crystal layers laminated to each other, the first crystal layer having a cubic crystal in which positions of constituent atoms are reversibly replaced by application of energy, the second crystal layer having a composition different from that of the first crystal layer; and
an orientation layer that is an underlaying layer of the superlattice laminate and causes a laminated surface of the first crystal layer to be (111)-orientated.
22. A data processing device comprising:
a program area; and
a data processing circuit that performs a predetermined operation based on a program stored in the program area,
wherein the program area includes a memory cell, the memory cell comprises:
a superlattice laminate including first and second crystal layers laminated to each other, the first crystal layer having a cubic crystal in which positions of constituent atoms are reversibly replaced by application of energy, the second crystal layer having a composition different from that of the first crystal layer; and
an orientation layer that is an underlaying layer of the superlattice laminate and causes a laminated surface of the first crystal layer to be (111)-orientated.