Method and apparatus for searching frame alignment with false alignment protection

1. A method for frame alignment, comprising:

obtaining assumed frames over a data stream with one bit position;

extracting one frame bit (“F-bit”) from each frame;

searching a predefined frame alignment signal over the F-bits;

identifying a first assumed extended super frame (“ESF”) when the predefined frame alignment signal is identified;

storing cyclic redundancy check (“CRC”) residue generated from a global CRC calculator when the first assumed ESF is identified;

obtaining a second assumed ESF over the data stream;

calculating a CRC value in accordance with a global CRC value and the CRC residue and associated F-bits with the second assumed ESF to adjust the global CRC value;

obtaining a third assumed ESF over the data stream; and

confirming a first ESF alignment when the CRC value matches with embedded CRC value extracted from the third assumed ESF.

2. The method of claim 1 , wherein obtaining a first assumed ESF includes:

identifying 24 frames in the first ESF; and

composing 24 F-bits by extracting one (1) bit from each frame.

3. The method of claim 1 , wherein searching a predefined frame alignment signal within the first assumed ESF includes identifying a predefined bit pattern in frame alignment signal of 24 F-bits.

4. The method of claim 3 , wherein calculating a CRC value in accordance with a global CRC calculation includes utilizing the residues to correct CRC values in CRC registers.

5. The method of claim 4 , wherein calculating a CRC value includes utilizing a set of predefined number of F-bits to adjust the first CRC value for compensating CRC result.

6. The method of claim 1 , wherein confirming a first ESF alignment includes,

extracting six (6) check bits from F-bits of a second ESF; and

confirming an ESF alignment when the calculated CRC value matches with the six (6) check bits.

7. A network device comprising:

a memory capable of being arranged its storage space into multiple storage sections for storing information from a data stream having a data format of multi-frame structure and a section of operation variables;

a processing device coupled to the memory and configured to identify a frame alignment relating to the data stream, wherein the processing device includes,

a pattern search module capable of identifying frame alignment signals in accordance with a predefined bit pattern; and

a cyclic redundancy check (“CRC”) module operable to generate a CRC value in response to a portion of residue values generated during previous assumed extended super frame (“ESF”) and a global CRC value generated based on an assumed alignment boundary.

8. The device of claim 7 , wherein each storage section is capable of storing 24 digital signal 1 (“DS1”) frames wherein each frame is logically organized in a single column.

9. The device of claim 8 , wherein the processing device includes one of central processing unit (“CPU”), digital processor, digital controller, digital signal processor (“DSP”), and a programmable processing circuit.

10. The device of claim 9 , wherein the CRC module is further capable of calculating the CRC value in response to a portion of F-bits.

11. The device of claim 10 , wherein the CRC module is further configured to compute a CRC value for every DS1 extended super frame (“ESF”) received from the data stream.

12. A method for identifying a frame boundary, comprising:

obtaining assumed frames over a data stream based on a bit position;

extracting one frame bit (“F-bit”) from each assumed frame;

saving cyclic redundancy check (“CRC”) residue in accordance with the assumed frames;

searching a predefined frame alignment signal over the F-bits;

identifying a first assumed extended super frame (“ESF”) when the predefined frame alignment signal is identified;

obtaining a second assumed ESF over the data stream based on the first assumed ESF;

calculating a CRC value in response to a global CRC value, the CRC residue and associated F-bits with the second assumed ESF to adjust the global CRC value; and

confirming an ESF alignment when the CRC value matches with embedded CRC value extracted from the second assumed ESF.

13. The method of claim 12 , wherein obtaining a first assumed ESF further includes,

identifying 24 frames in the first ESF; and

composing 24 F-bits by extracting one (1) bit from each frame.

14. The method of claim 12 , wherein searching a predefined frame alignment signal further includes identifying a predefined bit pattern in frame alignment signal of 24 F-bits.

15. The method of claim 12 , further comprising saving CRC residue in accordance with the second assumed ESF.

16. The method of claim 12 , wherein calculating a CRC value includes utilizing a set of predefined number of F-bits to adjust the first CRC value for compensating CRC result.

17. The method of claim 12 , wherein confirming a first ESF alignment includes,

extracting six (6) check bits from F-bits of a second ESF; and

confirming an ESF alignment when the calculated CRC value matches with the six (6) check bits.