IP Library Granted Patent US 8,298,878
Granted Patent B2
US 8,298,878 · App. 12/784,759 · Granted Oct 30, 2012

TFT-LCD array substrate and manufacturing method thereof

Assignee: Beijing BOE Optoelectronics Technology Co., Ltd.
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Quick Facts
Patent No.
US 8,298,878
App. No.
12/784,759
Granted
Oct 30, 2012
Kind
B2
Abstract

The embodiment of the invention provides a manufacturing method for a thin film transistor liquid crystal display (TFT-LCD) array substrate, the manufacturing method comprises: step 1, depositing a transparent conductive film, a source/drain metal film and a doped semiconductor film on a transparent substrate sequentially, forming patterns of a doped semiconductor layer, a source electrode and a drain electrode of a thin film transistor, a data line and a pixel electrode by a first patterning process, wherein the doped semiconductor layer remains on the source electrode and the drain electrode; Step 2, depositing a semiconductor film on the whole transparent substrate after Step 1, forming a pattern of a semiconductor layer which includes a channel of the thin film transistor by a second patterning process; Step 3, depositing an insulating film and a gate metal film on the whole transparent substrate after Step 2, forming patterns of a gate line and a gate electrode of the thin film transistor by a third patterning process, wherein the gate electrode is located above the channel of the thin film transistor.

Claims (56)

1. A manufacturing method for a thin film transistor liquid crystal display (TFT-LCD) array substrate, the array substrate including a gate electrode region, a data line region, a semiconductor region, a source electrode region, a drain electrode region, a gate line region and a pixel electrode region, wherein the manufacturing method comprises:

Step 1, depositing a transparent conductive film, a source/drain metal film and a doped semiconductor film on a transparent substrate sequentially, forming patterns of a doped semiconductor layer, a source electrode and a drain electrode of a thin film transistor, a data line and a pixel electrode by a first patterning process, wherein the doped semiconductor layer remains on the source electrode and the drain electrode;

Step 2, depositing a semiconductor film on the whole transparent substrate after Step 1, forming a pattern of a semiconductor layer that includes a channel of the thin film transistor by a second patterning process; and

Step 3, depositing an insulating film and a gate metal film on the whole transparent substrate after Step 2, forming patterns of a gate line and a gate electrode of the thin film transistor by a third patterning process, wherein the gate electrode is located above the channel of the thin film transistor,

wherein step 1 comprises:

after depositing the transparent conductive film, the source/drain metal film and the doped semiconductor film on the transparent substrate sequentially, applying a first photoresist layer on the doped semiconductor film;

exposing the first photoresist layer with a dual tone mask and developing the exposed first photoresist layer so that the first photoresist layer in the data line region, the source electrode region and the drain electrode region has a first thickness, the first photoresist layer in the pixel electrode region has a second thickness which is smaller than the first thickness, and the first photoresist layer does not remain in remaining regions;

removing the doped semiconductor film, the source/drain metal film and the transparent conductive film in the remaining regions by a first etching process;

removing the first photoresist layer with the second thickness by an ashing process so as to expose the doped semiconductor layer in the pixel electrode region;

removing the doped semiconductor film, the source/drain metal film in the pixel region by a second etching process; and

removing the remaining first photoresist layer.

2. The manufacturing method for the TFT-LCD array substrate of claim 1 , wherein step 2 comprises:

after depositing the semiconductor film on the whole transparent substrate after Step 1, applying a second photoresist layer on the semiconductor layer;

exposing the second photoresist layer with a mask and developing the exposed second photoresist layer that the second photoresist layer is only retained in the semiconductor layer region;

removing the exposed semiconductor film by a third etching process; and

removing the remaining second photoresist layer.

3. The manufacturing method for the TFT-LCD array substrate of claim 1 , wherein step 3 comprises:

after depositing the insulating film and the gate metal film on the whole transparent substrate after Step 2, applying a third photoresist layer on the gate metal film;

exposing the third photoresist layer with a mask and developing the exposed third photoresist layer so as to the third photoresist layer is only retained in the gate electrode region and the gate line region;

removing the exposed gate metal film by a fourth etching process; and

removing the remaining third photoresist layer.

4. The manufacturing method for the TFT-LCD array substrate of claim 1 , wherein the insulating film is a single-layer film of SiNx, SiOx or SiOxNy, or a multi-layer film formed of any combination of the above materials.

5. The manufacturing method for the TFT-LCD array substrate of claim 1 , wherein the source/drain metal film is a single-layer film formed of a metal material of molybdenum, aluminum, aluminum-neodymium alloy, tungsten, chromium, copper, or a multiple-layer film formed of any combination of the above metal materials.

6. The manufacturing method for the TFT-LCD array substrate of claim 1 , wherein the gate metal film is a single-layer film formed of a metal material of molybdenum, aluminum, aluminum-neodymium alloy, tungsten, chromium, copper, or a multiple-layer film formed of any combination of the above metal materials.

7. The manufacturing method for the TFT-LCD array substrate of claim 1 , wherein the source/drain metal film is etched by an etching agent by mixing phosphoric acid and nitric acid.

8. The manufacturing method for the TFT-LCD array substrate of claim 1 , wherein the transparent conductive film is etched by sulfuric acid or peroxide.

9. The manufacturing method for the TFT-LCD array substrate of claim 5 , wherein the source/drain metal film comprises Mo or a Mo/Al/Mo stack layer, and the doped semiconductor film and the source/drain metal film are etched by two consecutive dry etching processes.

10. A thin film transistor liquid crystal display (TFT-LCD) array substrate manufactured by the manufacturing method for the TFT-LCD array substrate of claim 1 .

11. A manufacturing method for a thin film transistor liquid crystal display (TFT-LCD) array substrate, the array substrate including a gate electrode region, a data line region, a semiconductor region, a source electrode region, a drain electrode region, a gate line region and a pixel electrode region, wherein the manufacturing method comprises:

Step 1, depositing a transparent conductive film, a source/drain metal film and a doped semiconductor film on a transparent substrate sequentially, forming patterns of a doped semiconductor layer, a source electrode and a drain electrode of a thin film transistor, a data line and a pixel electrode by a first patterning process, wherein the doped semiconductor layer remains on the source electrode and the drain electrode;

Step 2, depositing a semiconductor film on the whole transparent substrate after Step 1, forming a pattern of a semiconductor layer that includes a channel of the thin film transistor by a second patterning process; and

Step 3, depositing an insulating film and a gate metal film on the whole transparent substrate after Step 2, forming patterns of a gate line and a gate electrode of the thin film transistor by a third patterning process, wherein the gate electrode is located above the channel of the thin film transistor,

wherein step 2 comprises:

after depositing the semiconductor film on the whole transparent substrate after Step 1, applying a second photoresist layer on the semiconductor layer;

exposing the second photoresist layer with a mask and developing the exposed second photoresist layer that the second photoresist layer is only retained in the semiconductor layer region;

removing the exposed semiconductor film by a third etching process; and

removing the remaining second photoresist layer.

12. The manufacturing method for the TFT-LCD array substrate of claim 11 , wherein step 1 comprises:

after depositing the transparent conductive film, the source/drain metal film and the doped semiconductor film on the transparent substrate sequentially, applying a first photoresist layer on the doped semiconductor film;

exposing the first photoresist layer with a dual tone mask and developing the exposed first photoresist layer so that the first photoresist layer in the data line region, the source electrode region and the drain electrode region has a first thickness, the first photoresist layer in the pixel electrode region has a second thickness which is smaller than the first thickness, and the first photoresist layer does not remain in remaining regions;

removing the doped semiconductor film, the source/drain metal film and the transparent conductive film in the remaining regions by a first etching process;

removing the first photoresist layer with the second thickness by an ashing process so as to expose the doped semiconductor layer in the pixel electrode region;

removing the doped semiconductor film, the source/drain metal film in the pixel region by a second etching process; and

removing the remaining first photoresist layer.

13. The manufacturing method for the TFT-LCD array substrate of claim 12 , wherein the source/drain metal film is etched by an etching agent by mixing phosphoric acid and nitric acid.

14. The manufacturing method for the TFT-LCD array substrate of claim 12 , wherein the transparent conductive film is etched by sulfuric acid or peroxide.

15. The manufacturing method for the TFT-LCD array substrate of claim 11 , wherein step 3 comprises:

after depositing the insulating film and the gate metal film on the whole transparent substrate after Step 2, applying a third photoresist layer on the gate metal film;

exposing the third photoresist layer with a mask and developing the exposed third photoresist layer so as to the third photoresist layer is only retained in the gate electrode region and the gate line region;

removing the exposed gate metal film by a fourth etching process; and

removing the remaining third photoresist layer.

16. The manufacturing method for the TFT-LCD array substrate of claim 11 , wherein the insulating film is a single-layer film of SiNx, SiOx or SiOxNy, or a multi-layer film formed of any combination of the above materials.

17. The manufacturing method for the TFT-LCD array substrate of claim 11 , wherein the source/drain metal film is a single-layer film formed of a metal material of molybdenum, aluminum, aluminum-neodymium alloy, tungsten, chromium, copper, or a multiple-layer film formed of any combination of the above metal materials.

18. The manufacturing method for the TFT-LCD array substrate of claim 17 , wherein the source/drain metal film comprises Mo or a Mo/Al/Mo stack layer, and the doped semiconductor film and the source/drain metal film are etched by two consecutive dry etching processes.

19. The manufacturing method for the TFT-LCD array substrate of claim 11 , wherein the gate metal film is a single-layer film formed of a metal material of molybdenum, aluminum, aluminum-neodymium alloy, tungsten, chromium, copper, or a multiple-layer film formed of any combination of the above metal materials.

20. A thin film transistor liquid crystal display (TFT-LCD) array substrate manufactured by the manufacturing method for the TFT-LCD array substrate of claim 11 .

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 22, 2015
From: BEIJING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD
To: BOE TECHNOLOGY GROUP CO., LTD.; BEIJING BOE OPTOELECTRONICS TECHNOLOGY CO. LTD
Reel/Frame 036644/0601 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 21, 2010
From: YOO, SEONGYEOL; CHOI, SEUNGJIN; SONG, YOUNGSUK
To: BEIJING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.
Reel/Frame 024423/0787 →
Priority Claims (1)
CN 2009 1 0085506 · May 22, 2009 · national
Continuity (1)
Related Publication 20100295049A1 · Nov 25, 2010