Disk drive employing a preamp comprising read/write pass throughs for cascading integrated circuits
View Patent ↗A disk drive is disclosed comprising a plurality of disk surfaces and a plurality of corresponding heads. The disk drive further comprises a preamp including a first integrated circuit coupled to a first plurality of the heads. The first integrated circuit comprises a first read-output for outputting a preamplified read signal, a first write-input for receiving a first write signal, a write-output-passthrough for outputting a passthrough write signal in response to the first write signal, and a read-input-passthrough for receiving a passthrough read signal. The preamp further comprises a second integrated circuit coupled to a second plurality of the heads, wherein the second integrated circuit comprises a second read-output for outputting the passthrough read signal, and a second write-input for receiving the passthrough write signal.
1. A disk drive comprising:
a plurality of disk surfaces and a plurality of corresponding heads; and
a preamp comprising:
a first integrated circuit coupled to a first plurality of the heads, wherein the first integrated circuit comprising:
a first read-output for outputting a preamplified read signal;
a first write-input for receiving a first write signal;
a write-output-passthrough for outputting a passthrough write signal in response to the first write signal;
a read-input-passthrough for receiving a passthrough read signal; and
a second integrated circuit coupled to a second plurality of the heads,
wherein the second integrated circuit comprising:
a second read-output for outputting the passthrough read signal;
a second write-input for receiving the passthrough write signal; and
control circuitry operable to:
configure the preamp to select one of the heads during a read operation, and configure the preamp to select one of the heads during a write operation;
process the preamplified read signal at the read-output of the first integrated circuit during the read operation; and
apply the first write signal to the write-input of the first integrated circuit during a write operation.
2. The disk drive as recited in claim 1 , wherein:
the control circuitry is operable to generate at least one control signal applied to both the first and second integrated circuits of the preamp; and
the control signal operable to configure the preamp to select one of the heads during the read and write operation.
3. The disk drive as recited in claim 2 , wherein the control signal applied to both the first and second integrated circuits is wire-ORed.
4. The disk drive as recited in claim 1 , wherein the first integrated circuit comprises an amplifier for generating the passthrough write signal in response to the first write signal.
5. The disk drive as recited in claim 4 , wherein the control circuitry is further operable to enable the amplifier when selecting a head connected to the second integrated circuit during the write operation.
6. The disk drive as recited in claim 1 , wherein the first integrated circuit comprises an amplifier for generating the preamplified read signal in response to the passthrough read signal.
7. The disk drive as recited in claim 6 , wherein the control circuitry is further operable to enable the amplifier when selecting a head connected to the second integrated circuit during the read operation.
8. The disk drive as recited in claim 1 , wherein the first integrated circuit is substantially the same as the second integrated circuit.
9. A preamp for use in a disk drive, the disk drive comprising a plurality of disk surfaces and a plurality of corresponding heads, the preamp comprising:
a first integrated circuit coupled to a first plurality of the heads, wherein the first integrated circuit comprising:
a first read-output for outputting a preamplified read signal;
a first write-input for receiving a first write signal;
a write-output-passthrough for outputting a passthrough write signal in response to the first write signal;
a read-input-passthrough for receiving a passthrough read signal; and
a second integrated circuit coupled to a second plurality of the heads,
wherein the second integrated circuit comprising:
a second read-output for outputting the passthrough read signal;
a second write-input for receiving the passthrough write signal,
wherein the preamp is configurable to select one of the heads during a read operation, and the preamp is configurable to select one of the heads during a write operation.
10. The preamp as recited in claim 9 , wherein the first integrated circuit comprises an amplifier for generating the passthrough write signal in response to the first write signal.
11. The preamp as recited in claim 10 , wherein the amplifier is enabled when a head connected to the second integrated circuit is selected during the write operation.
12. The preamp as recited in claim 9 , wherein the first integrated circuit comprises an amplifier for generating the preamplified read signal in response to the passthrough read signal.
13. The preamp as recited in claim 12 , wherein the amplifier is enabled when a head connected to the second integrated circuit is selected during the read operation.
14. The preamp as recited in claim 9 , wherein the first integrated circuit is substantially the same as the second integrated circuit.
15. The preamp as recited in claim 14 , wherein:
the first integrated circuit comprises first address circuitry for addressing a first plurality of the heads; and
the second integrated circuit comprises second address circuitry for addressing a second plurality of the heads.
16. The preamp as recited in claim 15 , wherein:
the first address circuitry is responsive to a first external pin of the first integrated circuit, and
the second address circuitry is responsive to a second external pin of the second integrated circuit.
17. The preamp as recited in claim 16 , wherein at least one of the first and second external pins are grounded.
18. A method of operating disk drive, the disk drive comprising a plurality of disk surfaces and a plurality of corresponding heads, and a preamp comprising:
a first integrated circuit coupled to a first plurality of the heads, wherein the first integrated circuit comprising:
a first read-output for outputting a preamplified read signal;
a first write-input for receiving a first write signal;
a write-output-passthrough for outputting a passthrough write signal in response to the first write signal;
a read-input-passthrough for receiving a passthrough read signal; and
a second integrated circuit coupled to a second plurality of the heads, wherein the second integrated circuit comprising:
a second read-output for outputting the passthrough read signal;
a second write-input for receiving the passthrough write signal; and
the method comprising:
configuring the preamp to select one of the heads during a read operation, and configure the preamp to select one of the heads during a write operation;
processing the preamplified read signal at the read-output of the first integrated circuit during the read operation; and
applying the first write signal to the write-input of the first integrated circuit during a write operation.
19. The method as recited in claim 18 , further comprising generating at least one control signal applied to both the first and second integrated circuits of the preamp, wherein the control signal operable to configure the preamp to select one of the heads during the read and write operation.
20. The method as recited in claim 19 , wherein the control signal applied to both the first and second integrated circuits is wire-ORed.
21. The method as recited in claim 18 , wherein the first integrated circuit comprises an amplifier for generating the passthrough write signal in response to the first write signal.
22. The method as recited in claim 21 , further comprising enabling the amplifier when selecting a head connected to the second integrated circuit during the write operation.
23. The method as recited in claim 18 , wherein the first integrated circuit comprises an amplifier for generating the preamplified read signal in response to the passthrough read signal.
24. The method as recited in claim 23 , further comprising enabling the amplifier when selecting a head connected to the second integrated circuit during the read operation.
25. The method as recited in claim 18 , wherein the first integrated circuit is substantially the same as the second integrated circuit.