IP Library Patent Application 12789697
Patent Application
App. No. 12/789,697

MISFET, SEMICONDUCTOR DEVICE HAVING THE MISFET AND METHOD FOR MANUFACTURING THE SAME

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Quick Facts
Patent No.
US None
App. No.
12/789,697
Abstract

To solve the problem, a MISFET covered with an insulating film which generates stress is provided. The MISFET including a gate insulating film; a gate electrode disposed on the gate insulating film, the gate electrode including a polysilicon portion and a silicide portion; and a source/drain disposed adjacent to the gate electrode, in which the ratio between the polysilicon portion and the silicide portion is determined depending on a strain for enhancing the driving capability of the MISFET, the strain being generated on the basis of the stress through the gate electrode in a channel region of the MISFET.

Claims (16)

1 . A MISFET covered with an insulating film which generates stress, the MISFET comprising:

a gate insulating film disposed on a semiconductor substrate;

a gate electrode disposed on the gate insulating film, the gate electrode including a polysilicon portion and a silicide portion;

a source disposed adjacent to one side of the gate electrode; and

a drain disposed adjacent to the other side of the gate electrode,

wherein a ratio of length in a height direction of the polysilicon portion to length in a height direction of the silicide portion is determined depending on a strain for enhancing the driving capability of the MISFET, the strain being generated on the basis of the stress generated by the insulating film through the gate electrode in a channel region of the MISFET under the gate electrode;

wherein, when the stress generated by the insulating film is tensile stress and the MISFET is an N-type MISFET, the silicide has a higher Young's modulus than the polysilicon, and the ratio is in a range of 0.5 to 0.8.

2 . A MISFET covered with an insulating film which generates stress, the MISFET comprising:

a gate insulating film disposed on a semiconductor substrate;

a gate electrode disposed on the gate insulating film, the gate electrode including a polysilicon portion and a silicide portion;

a source disposed adjacent to one side of the gate electrode; and

a drain disposed adjacent to the other side of the gate electrode,

wherein a ratio of length in a height direction of the polysilicon portion to length in a height direction of the silicide portion is determined depending on a strain for enhancing the driving capability of the MISFET, the strain being generated on the basis of the stress generated by the insulating film through the gate electrode in a channel region of the MISFET under the gate electrode;

wherein, when the stress generated by the insulating film is tensile stress and the MISFET is a P-type MISFET, the silicide has a higher Young's modulus than the polysilicon, and the ratio is in a range of 0.6 to 0.9.

3 . The semiconductor according to claim 1 , wherein a silicide in the silicide potion is nickel silicide or titanium silicide.

4 . The semiconductor according to claim 2 , wherein a silicide in the silicide potion is nickel silicide or titanium silicide.