IP Library Granted Patent US 8,966,414
Granted Patent B2
US 8,966,414 · App. 12/789,991 · Granted Feb 24, 2015

Implementing a circuit using an integrated circuit including parametric analog elements

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Quick Facts
Patent No.
US 8,966,414
App. No.
12/789,991
Granted
Feb 24, 2015
Kind
B2
Abstract

An environment and method are provided for designing and implementing a circuit comprising an integrated circuit (IC) including a number of parametric analog elements for which operating parameters can be set. Generally, the method comprises: specifying requirements for the circuit including physical properties to be sensed by the circuit and actions to be taken by the circuit; designing the circuit based on the specified requirements and resources available on the IC; and setting parameters of at least one of the parametric analog circuit elements of the IC based on the circuit design. In one embodiment, the specifying, designing, and setting parameters steps are performed using a computer executable code embodied in a computer readable medium on a server coupled to a client computer through an internet protocol network. Other embodiments are also provided.

Claims (18)

1. A design system for implementing a circuit comprising:

an input module to receive from a user information specifying requirements for the circuit including physical properties to be sensed by the circuit and actions to be taken by the circuit;

a design module to: (i) design the circuit based on the specified requirements, the circuit comprising a configurable integrated circuit (IC) including a number of parametric analog circuit elements for which operating parameters can be set by the design system and a host system coupled to the implemented circuit; and (ii) verify the circuit design satisfies a number of the specified requirements; and

an output module to: (i) set parameters of at least one of the parametric analog circuit elements of the configurable IC based on the circuit design; and (ii) communicate instructions to the user for electrically coupling a number of sub-circuits to the configurable IC to implement the circuit,

wherein the configurable IC further comprises configurable signal path elements including an analog-to-digital converter (ADC) that is utilized in a plurality of different signal paths, and a scheduler to schedule sampling of the ADC by the plurality of different signal paths.

2. A design system according to claim 1 , further comprising a calibration module to calibrate the implemented circuit.

3. A design system according to claim 1 , wherein the configurable IC further comprises a memory to store alternate parameter settings, and the output module stores alternate parameter settings of at least one of the parametric analog circuit elements in the memory.

4. A design system according to claim 3 , wherein the configurable IC is configured to switch between parameters initially set by the design system and alternate parameter settings stored in the memory based on a timer, a sensed condition, or a mode change command received from the host system.

5. A design system according to claim 1 , wherein the design module comprises an ADC utilization module to calculate the ADC usage by the plurality different of signal paths.

6. A design system comprising:

an input module to receive from a user specified requirements for a circuit including a configurable integrated circuit (IC), the configurable IC including a number of analog elements for which parameters can be set both by the design system and by a host system coupled to the circuit after the circuit is implemented;

a design module to generate a design for the circuit based on the specified requirements; and

an output module to set parameters of at least one of the analog elements based on the design,

wherein the configurable IC further comprises a memory to store alternate parameter settings, and wherein the output module stores alternate parameter settings of at least one of the parametric analog circuit elements in the memory, and wherein the configurable IC further comprises configurable signal path elements including an analog-to-digital converter (ADC) that is utilized in a plurality of different signal paths, and a scheduler to schedule sampling of the ADC by the plurality different of signal paths.

7. A design system according to claim 6 , wherein the circuit further comprises a number of sub-circuits including a sensor sub-circuit or an actuator sub-circuit, and wherein the output module comprises program code to communicate instructions to the user for electrically coupling the number of sub-circuits to the configurable IC to implement the circuit.

8. A design system according to claim 6 , wherein the configurable IC is configured to switch between parameters initially set by the design system and alternate parameter settings stored in the memory based on a timer, a sensed condition, or a mode change command received from the host system.

9. A design system according to claim 6 , further comprising a calibration module to calibrate the implemented circuit.

10. A design system according to claim 6 , wherein the design module comprises an ADC utilization module to calculate the ADC usage by the plurality different of signal paths.

Assignments (6)
RELEASE OF SECURITY INTEREST Recorded Mar 16, 2022
From: MUFG UNION BANK, N.A.
To: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
Reel/Frame 059410/0438 →
CORRECTIVE ASSIGNMENT TO CORRECT THE 8647899 PREVIOUSLY RECORDED ON REEL 035240 FRAME 0429. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTERST. Recorded Nov 3, 2020
From: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 058002/0470 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN INTELLECTUAL PROPERTY Recorded Oct 28, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: MUFG UNION BANK, N.A.
Reel/Frame 050896/0366 →
SECURITY INTEREST Recorded Mar 21, 2015
From: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 035240/0429 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 6, 2011
From: ACZENT INC.
To: CYPRESS SEMICONDUCTOR CORPORATION
Reel/Frame 026397/0589 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 9, 2010
From: LEHOTY, DAVID A.; VISCONTI, ANTONIO
To: ACZENT, INC.
Reel/Frame 024509/0194 →