IP Library Granted Patent US 8,598,867
Granted Patent B2
US 8,598,867 · App. 12/793,813 · Granted Dec 3, 2013

Circuits and methods for generating a threshold signal used in a motion detector

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Quick Facts
Patent No.
US 8,598,867
App. No.
12/793,813
Granted
Dec 3, 2013
Kind
B2
Abstract

A circuit to detect a movement of an object provides a threshold selection module that uses one or more threshold signals identified prior to a present cycle of magnetic field signal in order to establish a threshold signal used for a present cycle of the magnetic field signal. A method associated with the circuit is also described.

Claims (120)

1. A circuit for detecting a movement of an object, comprising:

at least one magnetic field sensing element for generating a DIFF signal proportional to a magnetic field associated with the object, wherein the DIFF signal has cycles including a present cycle;

at least one motion detector configured to generate a motion signal indicative of the movement of the object, wherein the motion signal has edges associated with the cycles of the DIFF signal, wherein the at least one motion detector comprises:

a threshold generator circuit coupled to receive the DIFF signal and configured to generate a threshold signal;

at least one threshold selection module coupled to receive the threshold signal, configured to save samples of the threshold signal, configured to select samples of the threshold signal associated with a prior cycle of the DIFF signal a predetermined number of cycles before the present cycle, and configured to generate a selected threshold signal related to the selected samples of the threshold signal; and

a comparator coupled to receive a signal representative of the selected threshold signal, coupled to receive the DIFF signal, configured to compare the signal representative of the selected threshold signal with the DIFF signal, and configured to generate the motion signal.

2. The circuit of claim 1 , wherein the at least one threshold selection module is further configured to select a plurality of samples of the threshold signal associated with a respective plurality of prior cycles of the DIFF signal, wherein each one of the plurality of prior cycles is a respective predetermined number of cycles before the present cycle, wherein the at least one threshold selection module further comprises:

a function processor configured to combine the plurality of samples of the threshold signal to generate the selected threshold signal.

3. The circuit of claim 2 , wherein the function processor is configured to average the plurality of samples of the threshold signal to generate the selected threshold signal.

4. The circuit of claim 1 , wherein the at least one threshold selection module comprises:

an analog-to-digital converter coupled to receive the threshold signal and configured to convert the threshold signal to digital samples of the threshold signal;

a memory coupled to receive the digital samples and configured to save a plurality of the digital samples; and

a digital-to-analog converter coupled to receive samples related to selected ones of the plurality of the digital samples and configured to generate the selected threshold signal related to the selected ones of the plurality of the digital samples.

5. The circuit of claim 4 , wherein the memory comprises a multi-bit digital shift register.

6. The circuit of claim 1 , wherein the at least one threshold selection module comprises:

an analog memory coupled to receive the threshold signal and configured to save a plurality of analog samples of the threshold signal; and

a circuit module configured to select analog samples from among the plurality of analog samples and configured to generate the selected threshold signal related to the selected analog samples.

7. The circuit of claim 6 , wherein the analog memory comprises an analog shift register.

8. The circuit of claim 1 , further comprising a combining circuit configured to combine the threshold signal with the selected threshold signal to provide the signal representative of the selected threshold signal.

9. The circuit of claim 1 , further comprising a splitting circuit configured to split the selected threshold signal into first and second different selected threshold signals and configured to provide, at different respective times, the first and second different selected threshold signals as the signal representative of the selected threshold signal.

10. The circuit of claim 1 , wherein the threshold generator circuit is configured to generate first and second different threshold signals, wherein the at least one motion detector comprises first and second threshold selection modules,

wherein the first threshold selection module is coupled to receive the first threshold signal, configured to save samples of the first threshold, configured to select samples of the first threshold signal associated with of a cycle of the DIFF signal a first predetermined number of cycles before the present cycle, and configured to generate a first selected threshold signal related to the selected samples of the first threshold signal,

wherein the second threshold selection module is coupled to receive the second threshold signal, configured to save samples of the second threshold signal, configured to select samples of the second threshold signal associated with of a cycle of the DIFF signal a second predetermined number of cycles before the present cycle and configured to generate a second selected threshold signal related to the selected samples of the second threshold signal, wherein the circuit further comprises:

a splitting circuit coupled to receive the first and second selected threshold signals and configured to provide, at different respective times, the first and second selected threshold signals as the signal representative of the selected threshold signal.

11. The circuit of claim 1 , wherein the threshold generator circuit comprises:

a PDAC configured to generate a PDAC output signal to track the DIFF signal during a PDAC update time interval and to hold the DIFF signal at times outside of the PDAC update time interval; and

an NDAC configured to generate an NDAC output signal to track the DIFF signal during an NDAC update time interval and to hold the DIFF signal at times outside of the NDAC update time interval.

12. The circuit of claim 11 , wherein the threshold generator circuit comprises a resistor ladder coupled to receive the PDAC output signal at a first end, coupled to receive the NDAC output signal at a second end, and configured to generate the threshold signal at an intermediate tap between the first and second ends.

13. The circuit of claim 11 , wherein the threshold generator circuit comprises:

a first voltage source coupled to receive the PDAC output signal and configured to generate a first threshold signal; and

a second different voltage source coupled to receive the NDAC output signal and configured to generate a second different threshold signal.

14. The circuit of claim 1 , wherein the threshold generator circuit comprises a resistor ladder coupled to receive a tracking signal that tracks the DIFF signal.

15. The circuit of claim 1 , wherein the at least one magnetic field sensing element comprises at least two magnetic field sensing elements for generating an RDIFF signal and an LDIFF signal, wherein the RDIFF signal has cycles including a present RDIFF cycle and the LDIFF signal has cycles including a present LDIFF cycle, wherein the at least one motion detector comprises first and second motion detectors coupled to receive the RDIFF and LDIFF signals, respectively, wherein the first motion detector is configured to generate a first motion signal indicative of the movement of the object, and wherein the second motion detector is configured to generate a second motion signal indicative of the movement of the object.

16. The circuit of claim 15 , wherein the first motion detector and the second motion detector are configured to generate first and second respective tracking signals to track the RDIFF signal and to track the LDIFF signal, respectively.

17. The circuit of claim 16 , wherein the first motion detector comprises:

a first PDAC configured to generate a first PDAC output signal to track the RDIFF signal during a first PDAC update time interval and to hold the RDIFF signal at times outside of the first PDAC update time interval;

a first NDAC configured to generate a first NDAC output signal to track the RDIFF signal during a first NDAC update time interval and to hold the RDIFF signal at times outside of the first NDAC update time interval;

a first threshold generator circuit configured to receive the RDIFF signal and configured to generate a first motion detector threshold signal; and

a first at least one threshold selection module coupled to receive the first motion detector threshold signal, configured to save samples of the first motion detector threshold signal, configured to select samples of the first motion detector threshold signal associated with a cycle of the RDIFF signal a first predetermined number of cycles before the present RDIFF cycle, and configured to generate a first selected threshold signal related to the selected samples of the first motion detector threshold signal, wherein the comparator comprises:

a first comparator coupled to receive a signal representative of the first selected threshold signal, coupled to receive the RDIFF signal, configured to compare the signal representative of the first selected threshold signal with the RDIFF signal, and configured to generate the first motion signal, wherein the second motion detector comprises:

a second PDAC configured to generate a second PDAC output signal to track the LDIFF signal during a second PDAC update time interval and to hold the LDIFF signal at times outside of the second PDAC update time interval;

a second NDAC configured to generate a second NDAC output signal to track the LDIFF signal during a second NDAC update time interval and to hold the LDIFF signal at times outside of the second NDAC update time interval;

a second threshold generator circuit configured to receive the LDIFF signal and configured to generate a second motion detector threshold signal; and

a second at least one threshold selection module coupled to receive the second motion detector threshold signal, configured to save samples of the second motion detector threshold signal, configured to select samples of the second motion detector threshold signal associated with a cycle of the LDIFF signal a second predetermined number of cycles before the present LDIFF cycle, and configured to generate a second selected threshold signal related to the selected samples of the first motion detector threshold signal, wherein the comparator further comprises:

a second comparator coupled to receive a signal representative of the second selected threshold signal, coupled to receive the LDIFF signal, configured to compare the signal representative of the second selected threshold signal with the LDIFF signal, and configured to generate the second motion signal.

18. A method of detecting a movement of an object, comprising:

generating a DIFF signal proportional to a magnetic field associated with the object, wherein the DIFF signal has cycles including a present cycle; and

generating a motion signal indicative of the movement of the object, wherein the motion signal has edges associated with the cycles of the DIFF signal, wherein the generating the motion signal comprises:

generating a threshold signal in accordance with the DIFF signal;

saving samples of the threshold signal;

selecting samples of the threshold signal associated with a prior cycle of the DIFF signal a predetermined number of cycles before the present cycle;

generating a selected threshold signal related to the selected samples of the threshold signal; and

comparing a signal representative of the selected threshold signal with the DIFF signal to generate the motion signal.

19. The method of claim 18 , wherein the method further comprises:

selecting a plurality of samples of the threshold signal associated with a respective plurality of cycles of the DIFF signal, wherein each one of the plurality of cycles is a respective predetermined number of cycles before the present cycle; and

combining the plurality of samples of the threshold signal to generate the selected threshold signal.

20. The method of claim 19 , wherein the combining comprises averaging the plurality of samples of the threshold signal to generate the selected threshold signal.

21. The method of claim 18 , wherein the saving comprises:

converting the threshold signal to digital samples; and

saving a plurality of the digital samples and wherein the generating the selected threshold signal comprises:

generating the selected threshold signal in accordance with samples related to the selected ones of the plurality of the digital samples.

22. The method of claim 21 , wherein the saving the plurality of the digital samples comprises saving the plurality of the digital samples in a multi-bit digital shift register.

23. The method of claim 18 , wherein the saving comprises:

saving analog samples of the threshold signal.

24. The method of claim 23 , wherein the saving the analog samples comprises saving the analog samples of the threshold signal in an analog memory comprising an analog shift register.

25. The method of claim 18 , further comprising combining the threshold signal with the selected threshold signal to provide the signal representative of the selected threshold signal.

26. The method of claim 18 , further comprising:

splitting the selected threshold signal into first and second different selected threshold signals; and

providing, at different respective times, the first and second different selected threshold signals as the signal representative of the selected threshold signal.

27. The method of claim 18 , wherein the generating the threshold signal comprises generating first and second different threshold signals, wherein the saving the samples of the threshold signal comprises:

saving samples of the first threshold signal; and

saving samples of the second different threshold signal, wherein the selecting the samples of the threshold signal comprises:

selecting samples of the first threshold signal associated with a cycle of the DIFF signal a first predetermined number of cycles before the present cycle; and

selecting samples of the second different threshold signal associated with a cycle of the DIFF signal a second predetermined number of cycles before the present cycle, wherein the generating the selected threshold signal comprises:

generating a first selected threshold signal related to the selected samples of the first threshold signal; and

generating a second selected threshold signal related to the selected samples of the second threshold signal, wherein the method further comprises:

providing, at different respective times, the first and second selected threshold signals as the signal representative of the selected threshold signal.

28. The method of claim 18 , wherein the generating the tracking signal comprises:

generating a PDAC output signal to track the DIFF signal during a PDAC update time interval and to hold the DIFF signal at times outside of the PDAC update time interval; and

generating an NDAC output signal to track the DIFF signal during an NDAC update time interval and to hold the DIFF signal at times outside of the NDAC update time interval.

29. The method of claim 28 , wherein the generating the threshold signal comprises:

receiving the PDAC output signal at a first end of a resistor ladder;

receiving the NDAC output signal at a second end of the resistor ladder; and

generating the threshold signals at an intermediate tap between the first and second ends.

30. The method of claim 28 , wherein the generating the threshold signal comprises:

receiving the PDAC output signal with a first voltage source; and

receiving the NDAC output signal with a second voltage source, wherein the generating the threshold signal comprises:

generating a first threshold signal with the first voltage source; and

generating a second different threshold signal with the second voltage source.

31. The method of claim 18 , wherein the generating the threshold signal comprises:

receiving the tracking signal with a resistor ladder; and

generating the threshold signal at an intermediate tap of the resistor ladder.

32. The method of claim 18 , wherein the generating the DIFF signal comprises:

generating an RDIFF signal and generating an LDIFF signal, each proportional to the magnetic field, wherein the RDIFF signal has cycles including a present RDIFF cycle and the LDIFF signal has cycles including a present LDIFF cycle, wherein the generating the motion signal comprises:

generating a first motion signal in accordance with the RDIFF signal; and

generating a second motion signal in accordance with the LDIFF signal.

33. The method of claim 32 , wherein the generating the tracking signal comprises:

generating a first tracking signal that tracks the RDIFF signal and that holds peaks of the RDIFF signal; and

generating a second tracking signal that tracks the LDIFF signal and that holds peaks of the LDIFF signal.

34. The method of claim 33 , wherein the generating the first tracking signal comprises:

generating a first PDAC output signal to track the RDIFF signal during a first PDAC update time interval and to hold the RDIFF signal at times outside of the first PDAC update time interval; and

generating a first NDAC output signal to track the RDIFF signal during a first NDAC update time interval and to hold the RDIFF signal at times outside of the first NDAC update time interval,

wherein the generating the second tracking signal comprises:

generating a second PDAC output signal to track the LDIFF signal during a second PDAC update time interval and to hold the LDIFF signal at times outside of the second PDAC update time interval; and

generating a second NDAC output signal to track the LDIFF signal during a second NDAC update time interval and to hold the LDIFF signal at times outside of the second NDAC update time interval,

wherein the generating the threshold signal comprises:

generating a first motion detector threshold signal related to at least one of the first PDAC output signal or the first NDAC output signal; and

generating a second motion detector threshold signal related to at least one of the second PDAC output signal or the second NDAC output signal;

wherein the saving the samples of the threshold signal comprises:

saving samples of the first motion detector threshold signal; and

saving samples of the second motion detector threshold signal,

wherein the selecting the samples of the threshold signal comprises:

selecting samples of the first motion detector threshold signal associated with a cycle of the RDIFF signal a first predetermined number of cycles before the present RDIFF cycle; and

selecting samples of the second motion detector threshold signal associated with a cycle of the LDIFF signal a second predetermined number of cycles before the present LDIFF cycle,

wherein the generating the selected threshold signal comprises:

generating a first selected threshold signal related to the selected samples of the first motion detector threshold signal; and

generating a second selected threshold signal related to the selected samples of the second motion detector threshold signal,

wherein the comparing comprises:

comparing a first signal representative of the first selected threshold signal with the RDIFF signal to generate the first motion signal; and

comparing a second signal representative of the second selected threshold signal with the LDIFF signal to generate the second motion signal.

Assignments (8)
RELEASE OF SECURITY INTEREST IN PATENTS AT REEL 053957/FRAME 0874 Recorded Nov 1, 2023
From: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH, AS COLLATERAL AGENT
To: ALLEGRO MICROSYSTEMS, LLC
Reel/Frame 065420/0572 →
RELEASE OF SECURITY INTEREST IN PATENTS (R/F 053957/0620) Recorded Jun 22, 2023
From: MIZUHO BANK, LTD., AS COLLATERAL AGENT
To: ALLEGRO MICROSYSTEMS, LLC
Reel/Frame 064068/0360 →
PATENT SECURITY AGREEMENT Recorded Jun 22, 2023
From: ALLEGRO MICROSYSTEMS, LLC
To: MORGAN STANLEY SENIOR FUNDING, INC., AS THE COLLATERAL AGENT
Reel/Frame 064068/0459 →
PATENT SECURITY AGREEMENT Recorded Oct 1, 2020
From: ALLEGRO MICROSYSTEMS, LLC
To: MIZUHO BANK LTD., AS COLLATERAL AGENT
Reel/Frame 053957/0620 →
PATENT SECURITY AGREEMENT Recorded Oct 1, 2020
From: ALLEGRO MICROSYSTEMS, LLC
To: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH, AS COLLATERAL AGENT
Reel/Frame 053957/0874 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 14, 2014
From: ALLEGRO MICROSYSTEMS EUROPE LIMITED
To: ALLEGRO MICROSYSTEMS, LLC
Reel/Frame 034171/0492 →
CONVERSION AND NAME CHANGE Recorded Apr 10, 2013
From: ALLEGRO MICROSYSTEMS, INC.
To: ALLEGRO MICROSYSTEMS, LLC
Reel/Frame 030426/0178 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 4, 2010
From: FOLETTO, ANDREA; FRIEDRICH, ANDREAS P.
To: ALLEGRO MICROSYSTEMS, INC.
Reel/Frame 024487/0185 →