IP Library Granted Patent US 7,944,301
Granted Patent B1
US 7,944,301 · App. 12/799,154 · Granted May 17, 2011

Method and apparatus for an amplifier

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Quick Facts
Patent No.
US 7,944,301
App. No.
12/799,154
Granted
May 17, 2011
Kind
B1
Abstract

An amplifier including complementary push and pull components, a bias component and a quiescent current balancer. The complementary push and pull components are serially coupled to one another between an electrical source and sink to generate an output signal at a common output terminal responsive to the input signal source. The bias component is coupled between the input signal source and the complementary push-pull components to bias the input signal to the push component and the input signal to the pull component by discrete amounts which reduce cross-over clipping exhibited in the output signal. The quiescent current balancer is coupled to the output terminal to balance quiescent currents in the push and the pull component at discrete levels which equilibrate amplification levels of the input signal generated by the push component and the pull component in the output signal at the output terminal.

Claims (6)

1. An amplifier for amplifying an input signal from an input signal source, and the amplifier comprising:

complementary push and pull components serially coupled to one another between an electrical source and sink to generate an output signal at a common output terminal there between responsive to the input signal source, and the complementary push and pull components including;

a push component having a push op amp driving the gate of a “P” type field effect transistor coupled between a voltage source and the output terminal to amplify the input signal at the output terminal; and

a pull component having a pull op amp driving the gate of an “N” type field effect transistor coupled between the output terminal and a voltage sink and operating in anti-phase with respect to the push component to amplify the input signal at the output terminal.

a bias component coupled between the input signal source and the complementary push-pull components to bias the input signal to the push component and the input signal to the pull component by discrete amounts which reduce cross-over clipping exhibited in the output signal at the output terminal; and

a quiescent current balancer coupled to the output terminal of the complementary push and pull components to balance quiescent currents in the push and the pull component at discrete levels which equilibrate amplification levels of the input signal generated by the push component and the pull component in the output signal at the output terminal.

Assignments (4)
RELEASE OF SECURITY INTEREST Recorded Sep 30, 2015
From: ALCATEL-LUCENT USA, INC.
To: IKANOS COMMUNICATIONS, INC.
Reel/Frame 036732/0876 →
RELEASE OF SECURITY INTEREST Recorded Sep 30, 2015
From: SILICON VALLEY BANK
To: IKANOS COMMUNICATIONS, INC.
Reel/Frame 036733/0031 →
SECURITY INTEREST Recorded Jun 10, 2015
From: IKANOS COMMUNICATIONS, INC.
To: SILICON VALLEY BANK
Reel/Frame 035874/0351 →
NOTICE OF GRANT OF SECURITY INTEREST IN PATENTS Recorded May 5, 2015
From: IKANOS COMMUNICATIONS, INC.
To: ALCATEL-LUCENT USA, INC.
Reel/Frame 035581/0710 →