Semiconductor device manufacturing method and semiconductor device
View Patent ↗A formation method of an element isolation film according to which a high-voltage transistor with an excellent characteristic can be formed is provided. On a substrate, a gate oxide film is previously formed. A CMP stopper film is formed thereon, and thereafter, a gate oxide film and a CMP stopper film are etched. The semiconductor substrate is etched to form a trench. Further, before the trench is filled with a field insulating film, an liner insulating film is formed at a trench interior wall, and a concave portion at the side surface of the gate oxide film under the CMP stopper film is filled with the liner insulating film. In this manner, formation of void in the element isolation film laterally positioned with respect to the gate oxide film can be prevented.
1. A method for manufacturing a semiconductor device, comprising:
depositing a first gate oxide film and a CMP stopper film in this order on an entire surface of a substrate;
etching the first gate oxide film and the CMP stopper film using a resist pattern having an opening portion at an element isolation region;
forming a trench at the element isolation region on the substrate;
thermally oxidizing an exposed plane of the substrate in the trench to form a trench thermal oxide film;
forming a liner insulating film at an interior wall of the trench;
depositing a field insulating film over the entire surface of the substrate and planarizing the field insulating film until the CMP stopper film is exposed so that the trench is filled with the field insulating film;
removing the CMP stopper film by wet etching, to form at the element isolation region on the substrate an element isolation film including the trench thermal oxide film, the liner insulating film, and the field insulating film;
forming a first well of one of a first conductivity type and a second conductivity type at a first active region, the first active region being at least a part of a plurality of regions partitioned by the element isolation film on the substrate; and
forming a first transistor on the first well;
removing the first gate oxide film positioned at a prescribed region other than the first active region after forming the first well, and forming a second gate oxide film having a thickness smaller than that of the first gate oxide film;
forming a second well of one of the first conductivity type and the second conductivity type at a second active region, the second active region being at least a part of a prescribed region other than the first active region among the plurality of regions partitioned by the element isolation film on the substrate; and
forming on the second well a second transistor having a withstand voltage lower than that of the first transistor.
2. The method according to claim 1 , further comprising
thermally oxidizing the exposed plane of the substrate in the trench to form a preliminary thermal oxide film before forming the trench thermal oxide film, and removing the preliminary thermal oxide film, wherein
forming the trench thermal oxide film includes thermally oxidizing the exposed plane of the substrate in the trench again to form the trench thermal oxide film.
3. The method according to claim 2 , wherein,
the preliminary thermal oxide film is formed at a thickness of 10 nm to 15 nm under a temperature of 700° C. to 1000° C.
4. The method according to claim 1 , wherein
the trench thermal oxide film is formed at a thickness of 20 nm to 50 nm.
5. The method according to claim 1 , wherein,
the trench thermal oxide film is formed under a temperature of 950° C. to 1250° C.
6. The method according to claim 1 , wherein
the liner insulating film is formed at a thickness of 40 nm to 60 nm.
7. The method according to claim 1 , wherein
the CMP stopper film is removed by wet etching with hot phosphoric acid.
8. The method according to claim 1 , wherein
the first gate oxide film is formed at a thickness equal to or smaller than 50 nm.
9. The method according to claim 1 , wherein
the first gate oxide film is formed by thermal oxidation.