IP Library Granted Patent US 8,228,740
Granted Patent B2
US 8,228,740 · App. 12/814,451 · Granted Jul 24, 2012

Method of operating nonvolatile memory device

Assignee: SK Hynix Inc.
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Quick Facts
Patent No.
US 8,228,740
App. No.
12/814,451
Granted
Jul 24, 2012
Kind
B2
Abstract

A nonvolatile memory device is operated by, inter alia, performing a program operation on memory cells belonging to a page selected from among a plurality of pages, performing a verification operation on the programmed memory cells, loading a start loop value of a fail bit count set to the selected page, from among start loop values of fail bit counts set to the respective pages, and if a loop value of the program operation is greater than or equal to the start loop value, counting a number of fail bits included in data of the programmed memory cells detected in the verification operation.

Claims (51)

1. A method of operating a nonvolatile memory device, the method comprising:

performing a program operation on a page of memory cells selected from a plurality of pages;

performing a verification operation on the programmed memory cells;

loading a start loop value of a fail bit count set to the selected page among a plurality of start loop values of fail bit counts set to the corresponding plurality of pages; and

if a loop value of the program operation is greater than or equal to the start loop value, counting the fail bits in the data of the programmed memory cells detected in the verification operation.

2. The method of claim 1 , further comprising, if the loop value of the program operation is less than the start loop value, increasing the loop value of the program operation by 1 and then performing one or more times the steps comprising:

performing a program operation on a page of memory cells selected from a plurality of pages;

performing a verification operation on the programmed memory cells; and

loading a start loop value of a fail bit count set to the selected page among a plurality of start loop values of fail bit counts set to the plurality of pages.

3. The method of claim 1 , further comprising:

determining the selected page as a program pass if the number of counted fail bits after counting the fail bits in the data of the programmed memory cells detected in the verification operation is equal to or less than a number of error bits correctable by an error correction code (ECC) circuit; and

stopping to count the number of fail bits if the number of counted fail bits is greater than the number of error bits correctable by the ECC circuit.

4. The method of claim 3 , further comprising;

determining the selected page as a program fail after stopping to count the number of fail bits, if the loop value of the program operation is equal to a maximum loop value; and

increasing the loop value of the program operation by 1 if the loop value of the program operation is not equal to the maximum loop value, and then performing one or more times the steps of:

performing a program operation on a page of memory cells selected from a plurality of pages;

performing a verification operation on the programmed memory cells; and

loading a start loop value of a fail bit count set to the selected page among a plurality of start loop values of fail bit counts set to the corresponding plurality of pages.

5. The method of claim 1 , further comprising:

after performing the verification operation on the programmed memory cells, checking whether the verification operation for the selected page is a pass or a fail; and

if, as a result of the check, the verification operation for the selected page is a fail, proceeding to a step of loading a start loop value of a fail bit count set to the selected page among a plurality of start loop values of fail bit counts set to the corresponding plurality of pages.

6. The method of claim 1 , wherein the start loop value is set to a higher value for a page closer to a drain selection line.

7. The method of claim 1 , wherein the start loop value is set to a lower value for a page closer to a drain selection line.

8. The method of claim 1 , wherein the start loop value is set to a higher value for a page closer to a source selection line and a drain selection line.

9. The method of claim 1 , wherein the start loop value is set to a lower value for a page closer to a source selection line and a drain selection line.

10. A method of operating a nonvolatile memory device, the method comprising:

classifying a plurality of pages into one or more groups;

performing a program operation on a page of memory cells selected from the plurality of pages;

performing a verification operation on the programmed memory cells;

loading a start loop value of a fail bit count set to a group of the one or more groups to which the selected page is associated with among a plurality of start loop values of fail bit counts set to the corresponding one or more groups; and

if a loop value of the program operation is greater than or equal to the start loop value of the group to which the selected page is associated with, counting the fail bits in the data of the programmed memory cells detected in the verification operation.

11. The method of claim 10 , further comprising, if the loop value of the program operation is less than the start loop value, increasing the loop value of the program operation by 1 and then performing one or more times the steps comprising:

performing a program operation on a page of memory cells selected from the plurality of pages;

performing a verification operation on the programmed memory cells; and

loading a start loop value of a fail bit count set to a group of the one or more groups to which the selected page is associated with among one or more start loop values of fail bit counts set to the corresponding one or more groups.

12. The method of claim 10 , further comprising:

determining the selected group as a program pass if the number of counted fail bits after counting the number of fail bits included in the data of the programmed memory cells detected in the verification operation is equal to or less than a number of error bits correctable by an ECC circuit; and

stopping to count the number of fail bits if the number of counted fail bits is greater than the number of error bits correctable by the ECC circuit.

13. The method of claim 12 , further comprising:

determining the selected group as a program fail after stopping to count the number of fail bits, if the loop value of the program operation is equal to a maximum loop value; and

increasing the loop value of the program operation by 1 if the loop value of the program operation is not equal to the maximum loop value, and then performing one or more times the steps of:

performing a program operation on a page of memory cells selected from the plurality of pages;

performing a verification operation on the programmed memory cells; and

loading a start loop value of a fail bit count set to a group of the one or more groups to which the selected page is associated with among one or more start loop values of fail bit counts set to the corresponding one or more groups.

14. The method of claim 10 , further comprising:

after performing the verification operation on the programmed memory cells, checking whether the verification operation for the selected page is a pass or a fail; and

if, as a result of the check, the verification operation for the selected page is a fail, proceeding to a step of loading a start loop value of a fail bit count set to the selected page among a plurality of start loop values of fail bit counts set to the corresponding plurality of pages.

15. The method of claim 10 , wherein the start loop value is set to a higher value for a page closer to a drain selection line.

16. The method of claim 10 , wherein the start loop value is set to a lower value for a page closer to a drain selection line.

17. The method of claim 10 , wherein the start loop value is set to a higher value for a page closer to a source selection line and a drain selection line.

18. The method of claim 10 , wherein the start loop value is set to a lower value for a page closer to a source selection line and a drain selection line.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 12, 2010
From: JOO, BYOUNG IN
To: HYNIX SEMICONDUCTOR INC.
Reel/Frame 024526/0584 →
Priority Claims (1)
KR 10-2009-0052257 · Jun 12, 2009 · national
Continuity (1)
Related Publication 20100315880A1 · Dec 16, 2010