IP Library Granted Patent US 8,267,600
Granted Patent B2
US 8,267,600 · App. 12/817,091 · Granted Sep 18, 2012

Early self-validation of persistent memory during boot in an optical transceiver

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Quick Facts
Patent No.
US 8,267,600
App. No.
12/817,091
Granted
Sep 18, 2012
Kind
B2
Abstract

An operational optical transceiver configured to self-validate a boot image loaded from the persistent memory early in the boot process. The optical transceiver includes a persistent memory, a controller, and a system memory. The controller initializes the boot process and begins to load information from the persistent memory to the system memory. Next, the controller detects early in the boot process boot image verification data in the information being sent to the system memory. The controller then determines if the boot image verification data has an expected value. If the verification data includes the expected value, the controller continues the boot process. If the verification data does not include the expected value, the controller will retry the boot process a predetermined number of times and will enter a default operational state if the expected value is not detected while retrying the boot process the predetermined number of times.

Claims (20)

1. In an optical transceiver including an opto-electric receiver configured to receive a first optical data signal and convert the optical signal to a first electrical data signal, a post-amplifier configured to amplify the first electrical data signal, a driver configured to receive a second electrical data signal from an external host and provide a driving signal to an electro-optical transmitter, the electro-optical transmitter configured to emit light in response to the driving signal, a persistent memory configured to include boot microcode, the boot microcode including commands that initialize the optical transceiver during a boot process and verification data, a system memory configured to receive the boot microcode from the persistent memory during the boot process, and a controller configured to load information from the persistent memory to the system memory during the boot process, a method for validation of the persistent memory during the boot process, the method comprising:

initializing a boot process to begin loading boot microcode from the persistent memory to the system memory, the boot microcode including verification data;

detecting the verification data within the boot microcode loaded from the persistent memory to the system memory during the boot process initiation; and

determining whether the verification data has an expected value.

2. A method in accordance with claim 1 , wherein the determining step comprises the following:

determining that the verification data does have the expected value; and

continuing the boot process in response to the determining that the verification data does have the expected value.

3. A method in accordance with claim 1 , wherein the determining step comprises following:

determining that the verification data does not have the expected value;

repeating the boot process a predetermined number of times; and

entering a default operational state if the verification data does not have the expected value after repeating the boot process for the predetermined number of times.

4. A method in accordance with claim 3 , further comprising:

continuing the boot process if the verification data contains the expected value while repeating the boot process.

5. A method in accordance with claim 1 , wherein the controller is a boot controller.

6. A method in accordance with claim 1 , wherein the controller is a processor.

7. A method in accordance with claim 1 , wherein the verification data is loaded from the persistent memory to the system memory and detected by the controller before booting the optical transceiver.

8. A method in accordance with claim 1 , wherein the determining step comprises:

comparing the verification data with the expected value.

9. A method in accordance with claim 1 , wherein the boot process is a cold boot process.

10. A method in accordance with claim 1 , wherein the boot process is a warm boot process.

Assignments (5)
PATENT RELEASE AND REASSIGNMENT Recorded Jul 5, 2022
From: BANK OF AMERICA, N.A., AS ADMINISTRATIVE AGENT
To: II-VI INCORPORATED; MARLOW INDUSTRIES, INC.; EPIWORKS, INC.; LIGHTSMYTH TECHNOLOGIES, INC.; KAILIGHT PHOTONICS, INC.; COADNA PHOTONICS, INC.; OPTIUM CORPORATION; FINISAR CORPORATION; II-VI OPTICAL SYSTEMS, INC.; M CUBED TECHNOLOGIES, INC.; II-VI PHOTONICS (US), INC.; II-VI DELAWARE, INC.; II-VI OPTOELECTRONIC DEVICES, INC.; PHOTOP TECHNOLOGIES, INC.
Reel/Frame 060574/0001 →
SECURITY INTEREST Recorded Jul 1, 2022
From: II-VI INCORPORATED; II-VI DELAWARE, INC.; M CUBED TECHNOLOGIES, INC.; II-VI PHOTONICS (US), INC.; PHOTOP TECHNOLOGIES, INC.; COHERENT, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 060562/0254 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 1, 2020
From: FINISAR CORPORATION
To: II-VI DELAWARE, INC.
Reel/Frame 052286/0001 →
NOTICE OF GRANT OF SECURITY INTEREST IN PATENTS Recorded Sep 25, 2019
From: II-VI INCORPORATED; MARLOW INDUSTRIES, INC.; EPIWORKS, INC.; LIGHTSMYTH TECHNOLOGIES, INC.; KAILIGHT PHOTONICS, INC.; COADNA PHOTONICS, INC.; OPTIUM CORPORATION; FINISAR CORPORATION; II-VI OPTICAL SYSTEMS, INC.; M CUBED TECHNOLOGIES, INC.; II-VI PHOTONICS (US), INC.; II-VI DELAWARE, INC.; II-VI OPTOELECTRONIC DEVICES, INC.; PHOTOP TECHNOLOGIES, INC.
To: BANK OF AMERICA, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 050484/0204 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 22, 2019
From: DYBSETTER, GERALD L.; HAHIN, JAYNE C.
To: FINISAR CORPORATION
Reel/Frame 049258/0129 →