Enhancement-mode HFET circuit arrangement having high power and high threshold voltage
View Patent ↗A circuit includes input drain, source and gate nodes. The circuit also includes a group III nitride enhancement-mode HFET having a source, drain and gate and a voltage shifter having a first terminal connected to the gate of the enhancement mode HFET at a common junction. The circuit also includes a load resistive element connected to the common junction. The drain of the enhancement-mode HFET serves as the input drain node, the source of the enhancement-mode HFET serves as the input source node and a second terminal of the voltage shifter serves as the input gate node.
1. A circuit, comprising:
input drain, source and gate nodes;
a group III nitride enhancement-mode HFET having a source, drain and gate;
a voltage shifter having a first terminal connected to the gate of the enhancement mode HFET at a common junction;
a load resistive element connected to the common junction; and
wherein the drain of the enhancement-mode HFET serves as the input drain node, the source of the enhancement-mode HFET serves as the input source node and a second terminal of the voltage shifter serves as the input gate node.
2. The circuit of claim 1 wherein the group III nitride includes GaN.
3. The circuit of claim 1 wherein the enhancement-mode HFET is a low threshold voltage HFET.
4. The circuit of claim 1 wherein the voltage shifter comprises at least one diode.
5. The circuit of claim 1 wherein the voltage shifter comprises a plurality of Schottky diodes.
6. The circuit of claim 1 wherein the load resistive element comprises a resistor.
7. The circuit of claim 1 wherein the load resistive element comprises a transistor.
8. The circuit of claim 7 wherein the transistor comprises a depletion mode HFET having its gate shorted to its source.
9. The circuit of claim 1 wherein the voltage shifter comprises at least one transistor.
10. The circuit of claim 9 wherein the at least one transistor comprises a second group III enhancement mode HFET.
11. The circuit of claim 10 wherein the second group III enhancement mode HFET has its gate and source shorted to ground.
12. The circuit of claim 10 wherein the second group III enhancement mode HFET has a drain connected to the drain of the enhancement mode HFET and a source connected to the gate of the enhancement mode HFET.
13. The circuit of claim 1 further comprising a fourth input node, wherein a terminal of the load resistive element serves as the fourth input node.
14. The circuit of claim 1 wherein the enhancement-mode HFET and the voltage shifter are monolithically integrated.
15. The circuit of claim 1 wherein the enhancement-mode HFET, the voltage shifter and the load resistive element are monolithically integrated.
16. The circuit of claim 1 wherein the group III nitride depletion mode HFET comprises:
a substrate;
a first active layer disposed over the substrate;
a second active layer disposed on the first active layer, the second active layer having a higher bandgap than the first active layer such that a two-dimensional electron gas layer arises between the first active layer and the second active layer;
a recessed gate that extends through the second active layer; and
a source, gate and drain contact disposed over the second active layer.
17. An enhancement-mode HFET circuit, comprising:
input drain, source and gate nodes;
a group III nitride depletion-mode HFET having a source, drain and gate;
a voltage shifter having a first terminal connected to the gate of the depletion-mode HFET at a common junction;
a load resistive element having a first terminal connected to the common junction; and
wherein the drain of the depletion-mode HFET serves as the input drain node, the source of the depletion-mode HFET serves as the input source node, a second terminal of the voltage shifter serves as the input gate node and a second terminal of the load resistive element serving as a fourth input node.