Method for manufacturing semiconductor device
View Patent ↗A method for manufacturing a semiconductor device includes forming a first-conductivity-type well and a second-conductivity-type well in a silicon substrate; stacking a first high-dielectric-constant insulating film and a first cap dielectric film above the silicon substrate; removing at least the first cap dielectric film from above the second-conductivity-type well; conducting a first annealing at a first temperature to cause an element included in the first cap dielectric film to diffuse into the first high-dielectric-constant insulating film disposed above the first-conductivity-type well; after the first annealing, stacking a second high-dielectric-constant insulating film and a second cap dielectric film above the silicon substrate; removing the second cap dielectric film disposed above the first-conductivity-type well; and conducting a second annealing at a second temperature lower than the first temperature to cause an element included in the second cap dielectric film to diffuse into the second high-dielectric-constant insulating film disposed above the second-conductivity-type well.
1. A method for manufacturing a semiconductor device comprising:
forming a first-conductivity-type well of a first conductivity type and a second-conductivity-type well of a conductivity type opposite to the first conductivity type in a silicon substrate;
stacking a first high-dielectric-constant insulating film and a first cap dielectric film above the silicon substrate;
removing at least the first cap dielectric film from above the second-conductivity-type well;
conducting a first annealing at a first temperature to cause an element included in the first cap dielectric film to diffuse into the first high-dielectric-constant insulating film disposed above the first-conductivity-type well;
after said stacking the first high-dielectric-constant insulating film and the first cap dielectric film and after the first annealing, stacking a second high-dielectric-constant insulating film and a second cap dielectric film above the silicon substrate;
removing the second cap dielectric film disposed above the first-conductivity-type well; and
conducting a second annealing at a second temperature lower than the first temperature to cause an element included in the second cap dielectric film to diffuse into the second high-dielectric-constant insulating film disposed above the second-conductivity-type well.
2. The method according to claim 1 ,
wherein, in removing at least the first cap dielectric film from above the second-conductivity-type well, the first high-dielectric-constant insulating film is also removed.
3. The method according to claim 1 ,
wherein, in removing at least the first cap dielectric film from above the second-conductivity-type well, the first high-dielectric-constant insulating film is left, and
the second high-dielectric-constant insulating film and the second cap dielectric film are stacked on the first high-dielectric-constant insulating film above the second-conductivity-type well.
4. The method according to claim 1 , further comprising:
in stacking the first high-dielectric-constant insulating film and the first cap dielectric film, stacking a first hard mask film on the first cap dielectric film; and
before the first annealing, removing the first hard mask film.
5. The method according to claim 1 , further comprising:
in stacking the second high-dielectric-constant insulating film and the second cap dielectric film, stacking a second hard mask film on the second cap dielectric film; and
before the second annealing, removing the second hard mask film.
6. The method according to claim 1 , further comprising:
after stacking the second high-dielectric-constant insulating film and the second cap dielectric film, stacking a third high-dielectric-constant insulating film on the second cap dielectric film; and
in removing the second cap dielectric film disposed above the first-conductivity-type well, also removing the third high-dielectric-constant insulating film.
7. The method according to claim 1 ,
wherein each of the first high-dielectric-constant insulating film and the second high-dielectric-constant insulating film is a hafnium oxide film,
the first cap dielectric film is an aluminum oxide film, and
the second cap dielectric film is a lanthanum oxide film.
8. The method according to claim 7 , wherein the first high-dielectric-constant insulating film has a thickness in the range of 0.5 to 1.5 nm, and
the second high-dielectric-constant insulating film has a thickness in the range of 0.5 to 2.0 nm.
9. The method according to claim 7 ,
wherein the first cap dielectric film has a thickness in the range of 0.3 to 1.0 nm, and
the second cap dielectric film has a thickness in the range of 0.3 to 1.0 nm.
10. The method according to claim 7 ,
wherein the first annealing is conducted at a temperature in the range of 750° C. to 1,100° C., and
the second annealing is conducted at a temperature in the range of 500° C. to 950° C.
11. The method according to claim 7 ,
wherein the first annealing is conducted at a temperature in the range of 750° C. to 1,100° C.,
a first plasma nitriding treatment is conducted in a gas atmosphere including nitrogen, and
the second annealing is conducted at a temperature in the range of 750° C. to 1,100° C.