IP Library Granted Patent US 8,587,287
Granted Patent B2
US 8,587,287 · App. 12/828,640 · Granted Nov 19, 2013

High-bandwidth linear current mirror

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Quick Facts
Patent No.
US 8,587,287
App. No.
12/828,640
Granted
Nov 19, 2013
Kind
B2
Abstract

High linearity is essential in audio circuitry. As sampling rates for audio applications are needed, high speed and high linearity are needed in analog and mixed signal portions of audio circuitry such as in current mirrors. A current mirror employs two current paths in an output. The first current path is driven by a fast acting transistor through a resistor. The second current path is driven by a differential amplifier coupled to another transistor through another resistor. The second current path is used to maintain linearity by causing the voltage across both transistors to be the same.

Claims (55)

1. A circuit comprising:

a first transistor operable to receive an input current;

a first resistor in series with the first transistor operable to receive input current;

a second resistor operable to receive an output current;

a differential amplifier operable to compare a first voltage measured across the first resistor and a second voltage measured across the second resistor;

a second transistor responsive to the first transistor controlling a first current;

a third transistor responsive to the differential amplifier controlling a second current;

wherein the second transistor and third transistor are configured in parallel and the output current comprises the first current and the second current.

2. The circuit of claim 1 , wherein the first transistor, second transistor and third transistor are field effect transistors.

3. The circuit of claim 1 , wherein the first transistor, second transistor and third transistors are bipolar junction transistors having a high β.

4. The circuit of claim 1 , wherein the first resistor is a variable resistor.

5. The circuit of claim 1 , wherein the second resistor is a variable resistor.

6. The circuit of claim 1 , wherein the first resistor and the second resistor both have resistances that are substantially equal.

7. The circuit of claim 1 , wherein the differential amplifier is an operational amplifier.

8. The circuit of claim 1 , further comprising:

a current steering DAC;

an operational amplifier;

a third resistor;

wherein the current steering DAC is coupled to the first transistor and the second transistor is coupled to the third resistor and the operational amplifier.

9. The circuit of claim 8 , further comprising:

a single-ended amplifier; and

an output driver.

10. A circuit comprising:

a current steering DAC;

a means for controlling a first current on the basis of the input current;

a means for controlling a second current on the basis of comparing the input current with an output current, further comprising:

an operational amplifier; and

a resistor; and

wherein the output current comprises the first current and the second current, and the current steering DAC is coupled to a first transistor and a second transistor is coupled to the resistor and the operational amplifier.

11. The method of claim 10 wherein the means for controlling the second current comprises:

a means for comparing a first voltage across a first resistor operable to receiving the input current with a second voltage across a second resistor operable to receive the output current.

12. The circuit of claim 10 , further comprising:

a single-ended amplifier; and

an output driver.

13. A circuit comprising:

a first transistor operable to receive an input current;

a first resistor in series with the first transistor operable to receive input current;

a second resistor operable to receive an output current;

a differential amplifier operable to compare a first voltage measured across the first resistor and a second voltage measured across the second resistor;

a second transistor responsive to the first transistor controlling a first current;

a third transistor responsive to the differential amplifier controlling a second current;

wherein the second transistor and third transistor are configured in parallel and the output current comprises the first current and the second current, the first transistor, second transistor and third transistor are field effect transistors, and the first resistor is a variable resistor.

14. The circuit of claim 13 , wherein the second resistor is a variable resistor.

15. The circuit of claim 13 , wherein the first resistor and the second resistor both have resistances that are substantially equal.

16. The circuit of claim 13 , wherein the differential amplifier is an operational amplifier.

17. The circuit of claim 13 , further comprising:

a current steering DAC; and

an operational amplifier.

18. The circuit of claim 17 , further comprising:

a third resistor; and

wherein the current steering DAC is coupled to the first transistor and the second transistor is coupled to the third resistor and the operational amplifier.

19. The circuit of claim 18 , further comprising:

a single-ended amplifier; and

an output driver.

20. The circuit of claim 13 , wherein the second resistor is a variable resistor and the differential amplifier is an operational amplifier.