IP Library Granted Patent US 8,135,873
Granted Patent B2
US 8,135,873 · App. 12/832,581 · Granted Mar 13, 2012

Information processing device for performing information exchange between a PCI express bus and a non-PCI express bus interface

Assignee: Oki Semiconductor Co., Ltd.
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Quick Facts
Patent No.
US 8,135,873
App. No.
12/832,581
Granted
Mar 13, 2012
Kind
B2
Abstract

An information processing device includes: an address converter including a base address register in which address conversion information is stored and a conversion circuit that converts a PCI Express standard bus address of an inputted packet to a non-PCI Express standard bus address; and a packet generator. When first configuration information of a first device that has a device-unique unique address, is connected to a non-PCI Express standard bus and is unaware of the unique address is stored, the packet generator generates an address setting-use configuration write request packet, and when second configuration information including change information for changing the base address register to a base address register of a second device where at least one of an address width and an internal memory address is a device-unique unique value, the packet generator generates a change setting-use configuration write request packet and outputs the generated packet to the address converter.

Claims (16)

1. An information processing device comprising:

an address converter comprising

a base address register in which is stored an address conversion information including information relating to an address width of a bus that transmits and receives data and an internal memory address of a device, and

a conversion circuit that converts, on the basis of the address conversion information stored in the base address register, a Peripheral Component Interconnect (PCI) Express standard bus address of an inputted packet into a non-PCI Express standard bus address; and

a packet generator, wherein

when a first configuration information, which is based on the PCI Express standard and which includes a device-unique unique address of a first device that is connected to a non-PCI Express standard bus and that has the unique address and that is unaware of the unique address, is stored previously in a storage, the packet generator generates, on the basis of the first configuration information stored in the storage, an address setting configuration write request packet including the unique address that causes the first device to become aware of the unique address, and outputs the address setting configuration write request packet to the address converter, and

when a second configuration information which is based on the PCI Express standard and which includes a change information for changing the base address register to a base address register in which is stored a device-unique unique value of a second device that is connected to a non-PCI Express standard bus, the unique value being at least one of an address width or an internal memory address, is stored previously in the storage, the packet generator generates, on the basis of the second configuration information stored in the storage, a change setting configuration write request packet including the change information, and outputs the change setting configuration write request packet to the address converter.

2. The information processing device according to claim 1 , wherein format portions and type portions of headers of the address setting configuration write request packet and the change setting configuration write request packet have the same form as a PCI Express standard configuration write request packet.

3. The information processing device according to claim 1 , wherein

the first configuration information includes generated packet class information indicating that it is the first configuration information, and the second configuration information includes generated packet class information indicating that it is the second configuration information, and

when the generated packet class information indicates the first configuration information, the packet generator generates the address setting configuration write request packet including the generated packet class information, and when the generated packet class information indicates the second configuration information, the packet generator generates the change setting configuration write request packet including the generated packet class information.

4. The information processing device according to claim 3 , wherein when the address converter judges on the basis of the generated packet class information that the inputted packet is the address setting configuration write request packet, the address converter outputs the inputted address setting configuration write request packet to the first device without performing address conversion by the conversion circuit.

5. The information processing device according to claim 3 , wherein when the address converter judges on the basis of the generated packet class information that the inputted packet is the change setting configuration write request packet, the address converter changes the base address register to the base address register in which the unique value of the second device is stored.

6. The information processing device according to claim 1 , wherein

the address converter further comprises a first address converter that converts and outputs to the first device the address of the inputted packet and a second address converter that converts and outputs to the second device the address of the inputted packet, and

the packet generator outputs the generated address setting configuration write request packet to the first address converter and outputs the generated change setting configuration write request packet to the second address converter.

Assignments (2)
CHANGE OF NAME Recorded Mar 21, 2014
From: OKI SEMICONDUCTOR CO., LTD
To: LAPIS SEMICONDUCTOR CO., LTD.
Reel/Frame 032495/0483 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 8, 2010
From: UEHARA, TERUAKI
To: OKI SEMICONDUCTOR CO., LTD.
Reel/Frame 024654/0227 →
Priority Claims (1)
JP 2009-175706 · Jul 28, 2009 · national
Continuity (1)
Related Publication 20110029696A1 · Feb 3, 2011