Semiconductor device and method of forming conductive pillars in recessed region of peripheral area around the device for electrical interconnection to other devices
View Patent ↗A semiconductor wafer contains a plurality of semiconductor die each having a peripheral area around the die. A first insulating layer is formed over the die. A recessed region with angled sidewall is formed in the peripheral area. A first conductive layer is formed over the first insulating layer outside the recessed region and further into the recessed region. A conductive pillar is formed over the first conductive layer within the recessed region. A second insulating layer is formed over the first insulating layer, conductive pillar, and first conductive layer such that the conductive pillar is exposed from the second insulating layer. A dicing channel partially through the peripheral area. The semiconductor wafer undergoes backgrinding to the dicing channel to singulate the semiconductor wafer and separate the semiconductor die. The semiconductor die can be disposed in a semiconductor package with other components and electrically interconnected through the conductive pillar.
1. A semiconductor device, comprising:
a semiconductor wafer having a plurality of semiconductor die with a recessed region formed in a peripheral area around the semiconductor die;
a first insulating layer formed over the semiconductor die;
a first conductive layer formed over the first insulating layer outside the recessed region and further extending into the recessed region, the first conductive layer being electrically connected to a contact pad on the semiconductor die;
a conductive pillar formed over the first conductive layer within the recessed region, the conductive pillar extending above a portion of the first conductive layer outside the peripheral area; and
a second insulating layer formed over the first insulating layer, conductive pillar, and first conductive layer such that the conductive pillar is exposed from the second insulating layer.
2. The semiconductor device of claim 1 , further including a dicing channel formed partially through the peripheral area, wherein a portion of a backside of the semiconductor wafer is removed to the dicing channel to singulate the semiconductor wafer and separate the semiconductor die.
3. The semiconductor device of claim 1 , further including a plurality of conductive pillars formed in the recessed region, wherein the dicing channel is formed between the conductive pillars.
4. The semiconductor device of claim 1 , wherein the dicing channel is formed through the conductive pillar.
5. The semiconductor device of claim 1 , further including a second conductive layer formed over the second insulating layer and electrically connected to the conductive pillar.
6. The semiconductor device of claim 1 , wherein the recessed region has an angled or vertical sidewall.
7. A semiconductor device, comprising:
a semiconductor wafer having a plurality of semiconductor die with a recessed region formed in a peripheral area around the semiconductor die;
a first insulating layer formed over the semiconductor wafer;
a first conductive layer formed over the first insulating layer outside the recessed region and further extending into the recessed region;
a conductive pillar formed over the first conductive layer within the recessed region; and
a second insulating layer formed over the conductive pillar and first conductive layer.
8. The semiconductor device of claim 7 , wherein the semiconductor wafer is singulated through the peripheral area to separate the semiconductor die.
9. The semiconductor device of claim 7 , wherein the recessed region has an angled or vertical sidewall.
10. The semiconductor device of claim 7 , wherein the conductive pillar includes stacked bumps.
11. The semiconductor device of claim 7 , wherein a portion of the second insulating layer is removed to expose the conductive pillar.
12. The semiconductor device of claim 7 , wherein the semiconductor wafer includes a dicing channel formed partially through the peripheral area, wherein a portion of a backside of the semiconductor wafer is removed to the dicing channel to singulate the semiconductor wafer and separate the semiconductor die.
13. The semiconductor device of claim 7 , further including a second conductive layer formed over the second insulating layer and electrically connected to the conductive pillar.
14. A semiconductor device, comprising:
a semiconductor wafer having a plurality of semiconductor die with a peripheral area around the semiconductor die;
a recessed region formed in the peripheral area;
a first conductive layer formed in the recessed region;
a conductive pillar formed over the first conductive layer within the recessed region; and
an insulating layer formed over the conductive pillar and first conductive layer, wherein the semiconductor wafer is singulated through the peripheral area to separate the semiconductor die.
15. The semiconductor device of claim 14 , wherein the recessed region has an angled or vertical sidewall.
16. The semiconductor device of claim 14 , wherein the first conductive layer is formed over the semiconductor die outside the peripheral area.
17. The semiconductor device of claim 14 , wherein the conductive pillar includes stacked bumps.
18. The semiconductor device of claim 14 , further including a second conductive layer formed over the insulating layer and electrically connected to the conductive pillar.
19. The semiconductor device of claim 14 , wherein a portion of the insulating layer is removed to expose the conductive pillar.
20. The semiconductor device of claim 14 , further including a plurality of conductive pillars formed in the recessed region, wherein the dicing channel is formed between the conductive pillars.
21. A semiconductor device, comprising:
a semiconductor die having a recessed region formed in a peripheral area of the semiconductor die;
a first conductive layer formed in the recessed region;
a conductive pillar formed over the first conductive layer within the recessed region; and
an insulating layer formed over the conductive pillar and first conductive layer.
22. The semiconductor device of claim 21 , wherein the recessed region has an angled or vertical sidewall.
23. The semiconductor device of claim 21 , wherein the first conductive layer is formed over the semiconductor die outside the peripheral area.
24. The semiconductor device of claim 21 , wherein a portion of the insulating layer is removed to expose the conductive pillar.
25. The semiconductor device of claim 21 , further including a second conductive layer formed over the insulating layer and electrically connected to the conductive pillar.