IP Library Granted Patent US 8,363,169
Granted Patent B2
US 8,363,169 · App. 12/833,184 · Granted Jan 29, 2013

Auto-calibrating demodulator, associated method and TV receiver

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Quick Facts
Patent No.
US 8,363,169
App. No.
12/833,184
Granted
Jan 29, 2013
Kind
B2
Abstract

A demodulator comprises a reference voltage generating circuit for generating a reference voltage, a reference resistor for converting the reference voltage to a reference current, a current digital-to-analog converter (IDAC) for receiving a digital code and generating an output signal, a comparison apparatus for comparing the reference voltage with the output signal to generate a comparison output, and a calibration apparatus for updating the digital code according to the comparison output to calibrate the IDAC.

Claims (25)

1. An auto-calibrating television (TV) demodulator, comprising:

a reference voltage generating circuit that generates a reference voltage;

a reference resistor that converts the reference voltage to a reference current;

a current digital-to-analog convertor (IDAC) that receives a digital code and generates an output signal;

a comparison apparatus that compares the reference voltage with the output signal to generate a comparison output; and

a calibration apparatus that updates the digital code according to the comparison output.

2. The demodulator as recited in claim 1 , wherein the reference voltage generating circuit comprises a bandgap circuit.

3. The demodulator as recited in claim 1 , wherein the calibration apparatus increments the digital code according to the comparison output to calibrate an output swing of the output signal.

4. The demodulator as recited in claim 1 , wherein the IDAC comprises a plurality of current mirrors to mirror the reference current.

5. The demodulator as recited in claim 1 , wherein the reference resistor comprises an internal resistor.

6. The demodulator as recited in claim 1 , wherein comparison apparatus comprises an ADC, and the reference voltage is converted to a base digital code.

7. The demodulator as recited in claim 6 , wherein the calibration apparatus transmits a calibration code to the IDAC, which converts the output signal to obtain a corresponding digital code, and wherein the calibration apparatus updates the calibration code until the corresponding digital code is approximate to the base digital code.

8. The demodulator as recited in claim 6 , wherein the ADC comprises a successive approximation analog-to-digital converter (SAR ADC).

9. The demodulator as recited in claim 6 , further comprising a first switch, coupled between the reference voltage generating circuit and the ADC, that selectively transmits the reference voltage to the ADC to obtain the base digital code.

10. The demodulator as recited in claim 9 , further comprising a second switch, coupled between the IDAC and the ADC, that selectively transmits an output of the IDAC to the ADC to obtain a corresponding digital code.

11. The demodulator as recited in claim 10 , wherein the calibration apparatus updates the calibration code according to the corresponding digital code.

12. A method, for calibrating an output of a demodulator, comprising:

obtaining a base digital code according to a reference voltage;

transmitting a calibration code to a current digital-to-analog convertor (IDAC);

digitizing an output of the IDAC to obtain a corresponding digital code;

comparing the digital code and the base digital code to generate a comparison output; and

updating the calibration code according to the comparison output.

13. The method as recited in claim 12 , wherein updating the calibration code comprises updating the calibration code according to the comparison output till the corresponding digital code is approximate to the base digital code.

14. The method as recited in claim 12 , wherein the reference voltage is a bandgap voltage.

15. The method as recited in claim 12 , wherein the digital code is generated by a successive approximation analog-to-digital converter (SAR ADC).

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 3, 2021
From: MEDIATEK INC.
To: XUESHAN TECHNOLOGIES INC.
Reel/Frame 055486/0870 →
MERGER Recorded Jun 12, 2020
From: MSTAR SEMICONDUCTOR, INC.
To: MEDIATEK INC.
Reel/Frame 052931/0468 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 9, 2010
From: WEI, CHUN-KAI; LIN, YUNG-HSIN
To: MSTAR SEMICONDUCTOR, INC.
Reel/Frame 024658/0255 →