IP Library Granted Patent US 8,780,144
Granted Patent B2
US 8,780,144 · App. 12/835,824 · Granted Jul 15, 2014

Image processing apparatus, display system, electronic apparatus, and method of processing image

Inventor: Kazuto Kikuta (Hadnioji, JP)
Assignee: Seiko Epson Corporation
G09G3/3233G09G2320/046
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Quick Facts
Patent No.
US 8,780,144
App. No.
12/835,824
Granted
Jul 15, 2014
Kind
B2
Abstract

An image processing apparatus that performs display control of an image displayed on a display unit, includes a first control circuit for controlling image data of a frame in question or a display timing control signal corresponding to the image data so as to display each pixel forming the image with different brightness at given intervals, and a second control circuit for controlling the image data or the display timing control signal by different control from that by the first control circuit so as to display each pixel forming the image with different brightness at given intervals, wherein the first control circuit and the second control circuit control image data of an identical frame or a display timing control signal corresponding to the image data.

Claims (47)

1. An image processing apparatus that performs display control of an image displayed on a display unit, comprising:

a first control circuit to perform sticking prevention for controlling image data of a frame or a display timing control signal corresponding to the image data so as to display each pixel forming the image with different brightness at given intervals,

a second control circuit to perform sticking prevention for controlling the image data or the display timing control signal by different control from that by the first control circuit so as to display each pixel forming the image with different brightness at given intervals,

an interval register set with control data corresponding to an interval time between first control start timing by the first control circuit and second control start timing by the second control circuit,

after the control of the image data or the display timing control signal is started by the first control circuit, and the interval time set in the interval register has elapsed, the first control circuit and the second control circuit control image data of an identical frame or a display timing control signal corresponding to the image data,

the first control circuit and the second control circuit control image data of an identical frame or a display timing control signal corresponding to the image data by switching mode at predetermined intervals; wherein

the first control circuit and the second control circuit control the image data or the display timing control signal so as to display each pixel forming the image with different brightness at given intervals in at least one mode among a first mode of shifting an original display image by an amount corresponding to one dot after a first interval time has elapsed, a second mode of switching between interlace scanning and progressive scanning each time a second interval time has elapsed, a third mode of lowering a frame rate for each dot and a fourth mode of thinning out an image display for each given frame, and wherein

a first mode sequentially repeats, at every lapse of a given period of time,

a first shift of shifting an original display image by an amount corresponding to one scanning line in a first vertical scanning direction of a screen of the display panel,

a second shift of shifting the original display image by an amount corresponding to one dot in a first horizontal scanning direction of the screen of the display panel,

a third shift of shifting the original display image by an amount corresponding to one scanning line in the opposite direction to the first vertical scanning direction of the screen of the display panel, and

a fourth shift of shifting the original display image by an amount corresponding to one dot in the opposite direction to the first horizontal scanning direction of the screen of the display panel.

2. The image processing apparatus according to claim 1 , comprising

a still image continuous detection part for detecting whether or not frames for which images to be displayed are continuous still images,

the first control circuit and the second control circuit start control of the image data or the display timing control signal, provided that the still image continuous detection part detects that frames of still images are continuous.

3. The image processing apparatus according to claim 2 ,wherein

the still image continuous detection part detects whether or not frames of still images are continuous, based on a comparison result between a pixel value of each pixel forming an image of a frame in question and a pixel value of each pixel forming an image of an immediately preceding frame.

4. The image processing apparatus according to claim 3 , comprising

a detection condition designation register for designating a number of blocks matching between the frame in question and the immediately preceding frame in each of a plurality of blocks into which one screen is divided,

the still image continuous detection part performs a comparison between a pixel value of each pixel forming an image of a frame in question and a pixel value of each pixel forming an image of an immediately preceding frame, for each block, and detects whether or not frames of still images are continuous, based on the number of blocks designated by the detection condition designation register.

5. The image processing apparatus according to claim 4 , comprising

a threshold setting register for designating the number of matching or mismatching pixels in the block,

the still image continuous detection part determines that the block matches if the number of pixels matching in the block is equal to or more than the number of pixels set in the threshold setting register, or if the number of pixels mismatching in the block is equal to or less than the number of pixels set in the threshold setting register.

6. A display system comprising:

a display panel having a plurality of row signal lines, a plurality of column signal lines crossing the plurality of row signal lines, and a plurality of light emitting elements, which is identified by any of the plurality of row signal lines and any of the plurality of column signal lines, and emits light with brightness according to a driving current;

a row driver for driving the plurality of row signal lines;

a column driver for driving the plurality of column signal lines; and

the image processing apparatus according to claim 1 for outputting the display control signal to the row driver and the column driver and outputting the image data to the column driver.

7. An electronic apparatus comprising the image processing apparatus according to claim 1 .

8. A method of processing an image that performs display control of an image displayed on a display unit, comprising:

a first control step for performing sticking prevention of controlling image data of a frame or a display timing control signal based on the image data so as to display each pixel forming the image with different brightness at given intervals,

a second control step for performing sticking prevention of controlling the image data or the display timing control signal by different control from that by the first control step so as to display each pixel forming the image with different brightness at given intervals,

an interval setting step of setting an interval between first control start timing in the first control step and second control start timing in the second control step,

after control of the image data or the display timing control signal is started in the first control step, and an interval set in the interval setting step has elapsed, the first control step and the second control step control image data of an identical frame or a display timing control signal based on the image data,

the first control step and the second control step control image data of an identical frame or a display timing control signal based on the image data by switching mode at predetermined intervals; wherein

the first control step and the second control step control the image data or the display timing control signal so as to display each pixel forming the image with different brightness at given intervals in at least one mode among a first mode of shifting an original display image by an amount corresponding to one dot after a first interval time has elapsed, a second mode of switching between interlace scanning and progressive scanning each time a second interval time has elapsed, a third mode of lowering a frame rate for each dot and a fourth mode of thinning out an image display for each given frame, and wherein

a first mode sequentially repeats, at every lapse of a given period of time,

a first shift of shifting an original display image by an amount corresponding to one scanning line in a first vertical scanning direction of a screen of the display panel,

a second shift of shifting the original display image by an amount corresponding to one dot in a first horizontal scanning direction of the screen of the display panel,

a third shift of shifting the original display image by an amount corresponding to one scanning line in the opposite direction to the first vertical scanning direction of the screen of the display panel, and

a fourth shift of shifting the original display image by an amount corresponding to one dot in the opposite direction to the first horizontal scanning direction of the screen of the display panel.

9. The method of processing an image according to claim 8 , comprising

a still image continuous detection step of detecting whether or not frames for which images to be displayed are still images are continuous,

the first control step and the second control step start control of the image data or the display timing control signal, provided that the still image continuous detection step detects that frames of still images are continuous.

10. The method of processing an image according to claim 9 , wherein

the detection condition designation step designates the number of matching or mismatching pixels in the block, and

the still image continuous detection step determines that the block matches when the number of pixels matching in the block is equal to or more than the number of pixels matching in a block designated in the detection condition designation step, or when the number of pixels mismatching in the block is equal to or less than the number of pixels mismatching in a block designated in the detection condition designation step.

Assignments (4)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 14, 2024
From: CRYSTAL LEAP ZRT
To: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
Reel/Frame 066761/0627 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 1, 2024
From: SEIKO EPSON CORPORATION
To: CRYSTAL LEAP ZRT
Reel/Frame 066162/0434 →
RECORD TO CORRECT ASSIGNEE DATE OF EXECUTION, PREVIOUSLY RECORDED ON REEL 025112 FRAME 0669. Recorded Oct 18, 2010
From: KIKUTA, KAZUTO
To: SEIKO EPSON CORPORATION
Reel/Frame 025151/0710 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 8, 2010
From: KIKUTA, KAZUTO
To: SEIKO EPSON CORPORATION
Reel/Frame 025112/0669 →
Priority Claims (1)
JP 2009-188945 · Aug 18, 2009 · national
Continuity (1)
Related Publication 20110043551A1 · Feb 24, 2011