IP Library Granted Patent US 8,102,655
Granted Patent B2
US 8,102,655 · App. 12/837,078 · Granted Jan 24, 2012

Circuit device

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 8,102,655
App. No.
12/837,078
Granted
Jan 24, 2012
Kind
B2
Abstract

Provided is a circuit device capable of increasing the packaging density and preventing the thermal interference between circuit elements to be incorporated. In a hybrid integrated circuit device, a first circuit board and a second circuit board are fitted into a case member in a way that the first circuit board is overlaid with the second circuit board. A first circuit element is arranged on the upper surface of the first circuit board and a second circuit element is arranged on the upper surface of the second circuit board. Furthermore, inside the case member, provided is a hollow portion that is not filled with a sealing resin. Such a configuration prevents the second circuit element, which is a microcomputer, from operating unstably due to a heat generated in the first circuit element, which is a power transistor, for example.

Claims (20)

1. A circuit device, comprising:

a case member;

a first circuit board attached to a bottom portion of the case member;

a second circuit board fitted into the case member so as to define an internal space between the first and second circuit boards;

a semiconductor element mounted on a principal surface of the first circuit board; and

a circuit element mounted on a principal surface of the second circuit board and controlling the semiconductor element,

wherein the first circuit board is smaller than the second circuit board,

the bottom portion of the case member comprises a lattice-like frame having a center lattice cell opening into which the first circuit board fits and a peripheral lattice cell opening that is connected to the internal space of the case member so that the internal space and the peripheral opening of the bottom portion form a conduit for air flow, and

a bottom surface of the first circuit board opposite from the principal surface on which the semiconductor element is mounted is not covered by any device element of the circuit device so that the bottom surface of the first circuit board is exposed.

2. The circuit device of claim 1 , further comprising a sealing resin covering at least the principal surface of the first circuit board and the semiconductor element.

3. The circuit device of claim 1 , wherein the lattice-like frame of the case member has a plurality of peripheral lattice cell openings connected to the internal space of the case member, and in plan view of the circuit device the first circuit board is surrounded by the peripheral lattice cell openings.

4. The circuit device of claim 1 , wherein a sidewall of the case member has an opening connected to the internal space of the case member.

5. The circuit device of claim 1 , wherein the peripheral lattice cell opening in the lattice-like frame is covered by the second circuit board.

6. The circuit device of claim 1 , further comprising a conductive pad and a lead disposed on the conductive pad and penetrating through the second circuit board, wherein the semiconductor element and the circuit element are connected through the lead.

7. A circuit device, comprising:

a case member comprising a bottom portion and a sidewall portion, the bottom portion comprising a lattice-like frame having a center lattice cell opening in a middle portion of the lattice-like frame and also having additional lattice cell openings surrounding the center lattice cell opening;

a first circuit board mechanically engaging with the center lattice cell opening of the lattice-like frame;

a second circuit board fitted into the case member by mechanically engaging with the sidewall of the case member, the first and second circuit boards and the sidewall of the case member defining an internal space of the circuit device, the first circuit board being smaller than the second circuit board, and the internal space and the additional lattice cell openings being connected to form a conduit for air flow;

a semiconductor element mounted on the first circuit board; and

a circuit element mounted on the second circuit board and controlling the semiconductor element.

Assignments (7)
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 054090, FRAME 0617 Recorded Jun 23, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 064081/0167 →
SECURITY INTEREST Recorded Oct 16, 2020
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION; ON SEMICONDUCTOR CONNECTIVITY SOLUTIONS, INC.
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 054090/0617 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 23, 2016
From: SYSTEM SOLUTIONS CO., LTD.
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 038994/0667 →
CHANGE OF NAME Recorded Feb 19, 2016
From: SANYO SEMICONDUCTOR CO., LTD.
To: SYSTEM SOLUTIONS CO., LTD.
Reel/Frame 037773/0090 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 19, 2015
From: SAKAMOTO, HIDEYUKI; SAITO, HIDEFUMI; KOIKE, YASUHIRO; TSUKIZAWA, MASAO
To: SANYO ELECTRIC CO., LTD.; SANYO SEMICONDUCTOR CO., LTD.
Reel/Frame 036364/0879 →
CORRECTIVE ASSIGNMENT TO CORRECT THE INCORRECT #12/577882 PREVIOUSLY RECORDED ON REEL 026594 FRAME 0385. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded May 6, 2014
From: SANYO ELECTRIC CO., LTD
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 032836/0342 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 14, 2011
From: SANYO ELECTRIC CO., LTD.
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 026594/0385 →