IP Library Granted Patent US 8,665,968
Granted Patent B2
US 8,665,968 · App. 12/840,568 · Granted Mar 4, 2014

Method and system for 3D video coding using SVC spatial scalability

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Quick Facts
Patent No.
US 8,665,968
App. No.
12/840,568
Granted
Mar 4, 2014
Kind
B2
Abstract

Disclosed are various embodiments of three-dimensional (3D) video coding using scalable video coding (SVC) spatial scalability. In one embodiment, 3D video is encoded to generate a SVC base layer that includes a left first-resolution view and a right first-resolution view packed in a first frame. 3D video is encoded to generate a SVC enhancement layer that includes a left second-resolution view and a right second-resolution view packed in a second frame. The left second-resolution view and the right second-resolution view may have a higher spatial resolution than the left first-resolution view and the right first-resolution view.

Claims (32)

1. A method for processing video, the method comprising:

in a 3-dimensional (3D) video transmitter:

encoding a 3D video to generate a scalable video coding (SVC) base layer that comprises a left first-resolution view and a right first-resolution view packed in a first frame; and

encoding said 3D video to generate a SVC enhancement layer that comprises a left second-resolution view and a right second-resolution view packed in a second frame, wherein the left second-resolution view and the right second-resolution view have a higher spatial resolution than the left first-resolution view and the right first-resolution view.

2. The method according to claim 1 , wherein said first frame in said SVC base layer is a base-layer reference for said second frame in said SVC enhancement layer for inter-layer prediction of a spatial scalable coding.

3. The method according to claim 1 , wherein a first total bit quantity for said left first-resolution view is different from a second total bit quantity for said right first-resolution view.

4. The method according to claim 1 , wherein a first total bit quantity for said left second-resolution view is different from a second total bit quantity for said right second-resolution view.

5. The method according to claim 1 , comprising, when operating in a film mode in the 3D video transmitter:

encoding said 3D video to generate said SVC base layer in an interlaced format at a frame rate that is higher than an original frame rate of said 3D video, using pulldown; and

encoding said 3D video to generate said SVC enhancement layer in a progressive format at said original frame rate.

6. The method according to claim 5 , comprising transmitting said SVC base layer in said interlaced format at said higher frame rate and said SVC enhancement layer in said progressive format at said original frame rate to a 3D video receiver.

7. The method according to claim 1 , comprising transmitting said SVC base layer and said SVC enhancement layer in a single elementary stream in a transport stream to a 3D video receiver.

8. The method according to claim 1 , comprising transmitting said SVC base layer in a first elementary stream in a transport stream and said SVC enhancement layer in a second elementary stream in said transport stream to a 3D video receiver.

9. The method according to claim 1 , comprising transmitting said SVC base layer in a first transport stream and said SVC enhancement layer in a second transport stream to a 3D video receiver.

10. A system for processing video, the system comprising:

one or more processors, one or more circuits, or any combination thereof for use in a 3-dimensional (3D) video transmitter, said one or more processors, said one or more circuits, or any combination thereof being operable to:

encode a 3D video to generate a scalable video coding (SVC) base layer that comprises a left first-resolution view and a right first-resolution view packed in a first frame; and

encode said 3D video to generate a SVC enhancement layer that comprises a left second-resolution view and a right second-resolution view packed in a second frame, wherein the left second-resolution view and the right second-resolution view have a higher spatial resolution than the left first-resolution view and the right first-resolution view.

11. The system according to claim 10 , wherein said first frame in said SVC base layer is a base-layer reference for said second frame in said SVC enhancement layer for inter-layer prediction of a spatial scalable coding.

12. The system according to claim 10 , wherein a first total bit quantity for said left first-resolution view is different from a second total bit quantity for said right first-resolution view.

13. The system according to claim 10 , wherein a first total bit quantity for said left second-resolution view is different from a second total bit quantity for said right second-resolution view.

14. The system according to claim 10 , wherein, when operating in a film mode, said one or more processors, said one or more circuits, or any combination thereof are operable to:

encode said 3D video to generate said SVC base layer in an interlaced format at a frame rate that is higher than an original frame rate of said 3D video, using pulldown; and

encode said 3D video to generate said SVC enhancement layer in a progressive format at said original frame rate.

15. The system according to claim 14 , wherein said one or more processors, said one or more circuits, or any combination thereof are operable to transmit said SVC base layer in said interlaced format at said higher frame rate and said SVC enhancement layer in said progressive format at said original frame rate to a 3D video receiver.

16. The system according to claim 10 , wherein said one or more processors, said one or more circuits, or any combination thereof are operable to transmit said SVC base layer and said SVC enhancement layer in a single elementary stream in a transport stream to a 3D video receiver.

17. The system according to claim 10 , wherein said one or more processors, said one or more circuits, or any combination thereof are operable to transmit said SVC base layer in a first elementary stream in a transport stream and said SVC enhancement layer in a second elementary stream in said transport stream to a 3D video receiver.

18. The system according to claim 10 , wherein said one or more processors, said one or more circuits, or any combination thereof are operable to transmit said SVC base layer in a first transport stream and said SVC enhancement layer in a second transport stream to a 3D video receiver.

19. A method, comprising:

obtaining, in a 3-dimensional (3D) video receiver, a compressed 3D video comprising a scalable video coding (SVC) base layer and a SVC enhancement layer, the SVC base layer comprising a left first-resolution view and a right first-resolution view packed in a first frame, the SVC enhancement layer comprising a left second-resolution view and a right second-resolution view packed in a second frame, wherein the wherein the left second-resolution view and the right second-resolution view have a higher spatial resolution than the left first-resolution view and the right first-resolution view; and

decoding, in the 3D video receiver, the compressed 3D video using the SVC base layer to generate a decompressed 3D video.

20. The method of claim 19 , comprising decoding, in the 3D video receiver, the compressed 3D video using the SVC enhancement layer to generate the decompressed 3D video.

Assignments (6)
CORRECTIVE ASSIGNMENT TO CORRECT THE ERROR IN RECORDING THE MERGER IN THE INCORRECT US PATENT NO. 8,876,094 PREVIOUSLY RECORDED ON REEL 047351 FRAME 0384. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER. Recorded Mar 8, 2019
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 049248/0558 →
CORRECTIVE ASSIGNMENT TO CORRECT THE EFFECTIVE DATE OF THE MERGER PREVIOUSLY RECORDED AT REEL: 047230 FRAME: 0910. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER. Recorded Oct 29, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047351/0384 →
MERGER Recorded Oct 4, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047230/0910 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Feb 3, 2017
From: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
To: BROADCOM CORPORATION
Reel/Frame 041712/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 1, 2017
From: BROADCOM CORPORATION
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 041706/0001 →
PATENT SECURITY AGREEMENT Recorded Feb 11, 2016
From: BROADCOM CORPORATION
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 037806/0001 →