Insulated gate silicon carbide semiconductor device and method for manufacturing the same
View Patent ↗An insulated gate silicon carbide semiconductor device is provided having small on-resistance in a structure obtained by combining the SIT and MOSFET structures having normally-off operation. The device includes an n − semiconductor layer on an SiC n + substrate, a p-type base region and highly doped p-region both buried in the layer, a trench from the semiconductor layer surface to the p-base region, an n + first source region in the surface of a p-type base region at the bottom of the trench, a p-type channel region in the surface of the sidewall of the trench, one end of which contacts the first source region, a gate electrode contacting the trench-side surface of the channel region via a gate insulating film, and a source electrode contacting the trench-side surface of the gate electrode via an interlayer insulating film and contacting the exposed first source region and p-base region at the bottom of the trench.
1. A method for manufacturing an insulated gate silicon carbide semiconductor device, the method comprising:
forming a first conduction-type low-concentration deposition semiconductor layer deposited on a first conduction-type high-concentration semiconductor substrate;
forming a second conduction-type base region in the low concentration layer of the first conduction-type substrate via ion implantation;
forming a trench in the substrate that extends from the surface of the substrate to the gate region;
performing oblique ion implantation with respect to the substrate surface to form second conduction-type channel regions of low concentration in the sidewalls of the trench;
forming first conduction-type first source regions of high concentration at the bottom of the trench, wherein the first source region is formed within the base region;
forming a first conduction-type second source region of high concentration in a surface layer of the substrate, wherein the second source region is formed on the channel region;
depositing a gate insulating film over the sidewalls of the trench and forming a gate electrode on the gate insulating film;
forming an interlayer insulating file over the gate electrodes; and
forming a source electrode in the trench and a drain electrode on a bottom surface of the substrate.
2. A method for manufacturing an insulated gate silicon carbide semiconductor device as claimed in claim 1 , wherein the first conduction-type first source region and a first conduction-type second source region are formed simultaneously.
3. A method for manufacturing an insulated gate silicon carbide semiconductor device as claimed in claim 1 , wherein the gate insulating film and the gate electrode extend over the second source region.
4. A method for manufacturing an insulated gate silicon carbide semiconductor device as claimed in claim 1 , wherein the base region is formed of second conduction-type high concentration layer and a second conduction-type low concentration layer.
5. A method for manufacturing an insulated gate silicon carbide semiconductor device, the method comprising:
forming a second conductivity type base region in a low concentration layer of a first conductivity type substrate via ion implantation, the second conduction-type base region having a two-layer configuration including a deep high-concentration first base region and a shallow low-concentration second base region;
forming a first conductivity type second source region of high concentration in a surface layer of the substrate;
forming a trench in the substrate that extends from the surface of the substrate to the gate region;
performing oblique ion implantation with respect to the substrate surface to form second conductivity-type channel regions of low concentration in the sidewalls of the trench;
forming first conductivity-type first source regions of high concentration at the bottom of the trench;
depositing a gate insulating film over the sidewalls of the trench and forming a gate electrode on the gate insulating film;
forming an interlayer insulating file over the gate electrodes; and
forming a source electrode in the trench.
6. A method for manufacturing an insulated gate silicon carbide semiconductor device, the method comprising:
forming a first conduction-type low-concentration deposition semiconductor layer deposited on a first conduction-type high-concentration semiconductor substrate;
forming a second conduction-type base region in the low concentration layer of the first conduction-type substrate via ion implantation, the base region being formed of a second conduction-type high concentration layer and a second conduction-type low concentration layer;
forming a trench in the substrate that extends from the surface of the substrate to the gate region;
performing oblique ion implantation with respect to the substrate surface to form second conduction-type channel regions of low concentration in the sidewalls of the trench;
forming first conduction-type first source regions of high concentration at the bottom of the trench;
depositing a gate insulating film over the sidewalls of the trench and forming a gate electrode on the gate insulating film;
forming an interlayer insulating file over the gate electrodes; and
forming a source electrode in the trench and a drain electrode on a bottom surface of the substrate.