IP Library Granted Patent US 8,032,694
Granted Patent B2
US 8,032,694 · App. 12/844,354 · Granted Oct 4, 2011

Direct logical block addressing flash memory mass storage architecture

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Quick Facts
Patent No.
US 8,032,694
App. No.
12/844,354
Granted
Oct 4, 2011
Kind
B2
Abstract

A nonvolatile semiconductor mass storage system and architecture can be substituted for a rotating hard disk. The system and architecture avoid an erase cycle each time information stored in the mass storage is changed. Erase cycles are avoided by programming an altered data file into an empty mass storage block rather than over itself as a hard disk would. Periodically, the mass storage will need to be cleaned up. These advantages are achieved through the use of several flags, and a map to correlate a logical block address of a block to a physical address of that block. In particular, flags are provided for defective blocks, used blocks, and old versions of a block. An array of volatile memory is addressable according to the logical address and stores the physical address.

Claims (37)

1. A method comprising:

attempting to locate a free location in memory;

if a free location in the memory is located, storing a data file in the located location, setting a first flag associated with the located location, and updating a map correlating a logical address associated with the data file to a physical address associated with the located location; and

if a free location in memory is not located, erasing a data file stored in a used location in the memory having a set second flag associated therewith;

wherein updating the map comprises storing the physical address of the located location without storing the corresponding logical address associated with the data file.

2. The method of claim 1 , wherein attempting to locate a free location in memory comprises attempting to locate a first free location in memory.

3. The method of claim 1 , wherein the first flag comprises a used/free flag.

4. The method of claim 1 , wherein the second flag comprises an old/new flag.

5. The method of claim 1 , wherein a free location in the memory comprises a free block of a nonvolatile memory and wherein a used location in the memory comprises a used block of the nonvolatile memory.

6. The method of claim 5 , wherein if a free location in the memory is located and if the data file being stored in a block of the nonvolatile memory supersedes a previous data file, further comprising setting a second flag associated with a block of the nonvolatile memory in which the previous data file is stored.

7. The method of claim 6 , wherein setting a second flag associated with a block of the nonvolatile memory in which the previous data file is stored comprises setting a flag in the block of the nonvolatile memory in which the previous data file is stored.

8. The method of claim 5 , wherein attempting to locate a free block of the nonvolatile memory comprises attempting to locate a block of the nonvolatile memory having an unset first flag associated therewith.

9. The method of claim 5 , wherein attempting to locate a free block of the nonvolatile memory is performed responsive to receiving an instruction to store the data file.

10. The method of claim 5 , wherein erasing a data file stored in a used block of the nonvolatile memory comprises erasing data files stored in a plurality of used blocks of the nonvolatile memory.

11. The method of claim 5 , wherein each of the blocks of nonvolatile memory comprise a respective individually erasable portion of a nonvolatile storage device.

12. The method of claim 5 , wherein erasing a data file stored in a used block of the nonvolatile memory further comprises erasing the set second flag associated therewith.

13. The method of claim 12 , wherein erasing a data file stored in a used block of the nonvolatile memory further comprises erasing a first flag associated therewith.

14. The method of claim 1 , wherein the memory comprises nonvolatile memory and if a free location in the memory is located, further comprising storing the map in a location in volatile memory.

15. The method of claim 14 , wherein the first flag associated with the located location is stored in the located location.

16. The method of claim 14 , wherein the first flag associated with the located location is stored in the location in volatile memory.

17. The method of claim 14 , wherein setting a second flag associated with a block of the nonvolatile memory in which the previous data file is stored comprises setting a flag in a location in volatile memory.

18. A method comprising:

attempting to locate a free location in memory;

if a free location in the memory is located, storing a data file in the located location, setting a first flag associated with the located location, and updating a logical to physical address map with a physical address of the located location; and

if a free location in memory is not located, erasing a data file stored in a used location in the memory having a set second flag associated therewith;

wherein updating the logical to physical address map comprises storing the physical address without storing a logical address corresponding to the stored physical address.

19. The method of claim 18 , wherein storing the physical address without storing the logical address further comprises storing the physical address in a location in volatile memory corresponding to the logical address.

20. A method comprising:

reading a flag associated with a location in nonvolatile memory;

reading a logical address associated with the location in the nonvolatile memory; and

storing a physical address associated with the location in the nonvolatile memory in a location in volatile memory associated with the read logical address responsive to the read flag;

wherein the physical address is stored in the location in volatile memory without storing the read logical address in the location in volatile memory.

21. The method of claim 20 , wherein the reading and storing acts are performed responsive to a power up sequence.

22. The method of claim 21 , wherein performing the reading and storing acts responsive to a power up sequence comprises performing the reading and storing acts during the power up sequence.

23. The method of claim 20 , wherein the reading and storing acts are performed in response to a power down condition.

24. The method of claim 20 , further comprising addressing the location in the volatile memory using the read logical address.

25. The method of claim 20 , further comprising storing the read flag in the location in the volatile memory associated with the read logical address.

Assignments (7)
RELEASE OF SECURITY INTEREST Recorded Oct 9, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050937/0001 →
RELEASE OF SECURITY INTEREST Recorded Aug 23, 2018
From: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 047243/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REPLACE ERRONEOUSLY FILED PATENT #7358718 WITH THE CORRECT PATENT #7358178 PREVIOUSLY RECORDED ON REEL 038669 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Jun 8, 2017
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 043079/0001 →
PATENT SECURITY AGREEMENT Recorded Jun 2, 2016
From: MICRON TECHNOLOGY, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Reel/Frame 038954/0001 →
SECURITY INTEREST Recorded May 12, 2016
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 038669/0001 →
MERGER Recorded Jun 11, 2013
From: LEXAR MEDIA, INC.
To: MICRON TECHNOLOGY, INC.
Reel/Frame 030588/0368 →
MERGER Recorded Mar 25, 2011
From: LEXAR MEDIA, INC.
To: MICRON TECHNOLOGY, INC.
Reel/Frame 026024/0131 →