IP Library Granted Patent US 8,507,330
Granted Patent B2
US 8,507,330 · App. 12/845,057 · Granted Aug 13, 2013

Thin film transistor

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Quick Facts
Patent No.
US 8,507,330
App. No.
12/845,057
Granted
Aug 13, 2013
Kind
B2
Abstract

A method is proposed for producing a thin-film transistor (TFT), the method comprising forming a substrate, applying a ZnO-based precursor solution onto the substrate to form a ZnO-based channel layer, annealing the channel layer, forming a source electrode and a drain electrode on the channel layer, forming a dielectric layer on the channel layer and forming a gate electrode on the dielectric layer.

Claims (68)

1. A method for producing a thin-film transistor (TFT) comprising, in this order:

forming a substrate;

applying a metal oxide-based precursor solution onto the substrate to form a metal oxide-based channel layer;

annealing the channel layer;

forming a source electrode and a drain electrode on the channel layer;

forming a dielectric layer on the channel layer; and

forming a gate electrode on the dielectric layer,

wherein,

forming the dielectric layer further comprises baking the dielectric layer using a hot plate, patterning the dielectric layer using ultra-violet light and a shadow mask, and heat curing the dielectric layer in a vacuum oven.

2. The method according to claim 1 wherein the applying the metal oxide-based precursor solution comprises a process selected from the group consisting of:

spin coating the metal oxide-based precursor solution;

drop casting the metal oxide-based precursor solution; and

inkjet printing the metal oxide-based precursor solution.

3. The method according to claim 2 wherein the metal oxide-based precursor solution comprises a solute selected from the group consisting of:

zinc chloride;

tin chloride;

indium chloride; and

any combination thereof

4. The method according to any of the preceding claims wherein the metal oxide-based channel layer is a ZnO-based channel layer.

5. The method according to claim 1 wherein the annealing the channel layer is done at a temperature lower than or equal to 400° C.

6. The method according to claim 5 wherein the annealing the channel layer is done at a temperature greater than or equal to 200 20 C.

7. The method according to claim 1 wherein the dielectric layer is an organic polymer-based dielectric layer.

8. The method according to claim 7 wherein the dielectric layer is selected from the group consisting of:

a poly-4-vinylphenol (PVP) layer;

a poly-4-vinylphenol (PVP) and Benzocyclobutane (BCB) layer;

a poly-vinyl-cinemate (PVCi) layer; and

a poly-methyl-methacrylate (PMMA) layer.

9. The method according to any of claims 3 , 5 , 6 and 8 , wherein the forming the dielectric layer comprises a process selected from the group consisting of:

spin coating with an organic precursor solution;

drop casting with the organic precursor solution; and

inkjet printing with the organic precursor solution.

10. The method according to claim 9 wherein the organic precursor solution is prepared using:

a poly-vinyl-phenol (PVP) powder;

a poly-melamine-co-formaldehyde cross-linking agent; and

a solvent.

11. The method according to claim 10 wherein the solvent is selected from the group consisting of:

propylene glycol monomethyl ether acetate (PGMEA);

n-butanol;

1-propanol;

n-methylpyrrolidone (NMP); and

acetone.

12. The method according to any of claims 3 , 5 , 6 and 8 , wherein the forming the substrate comprises:

providing a B-doped Si layer; and

thermally growing a layer of SiO 2 on the B-doped Si Layer.

13. A method for producing a thin-film transistor (TFT) comprising, in this order:

forming a substrate;

applying a metal oxide-based precursor solution onto the substrate to form a metal oxide-based channel layer;

annealing the channel layer;

forming a source electrode and a drain electrode on the channel layer;

forming a dielectric layer on the channel layer; and

forming a gate electrode on the dielectric layer,

wherein,

forming the dielectric layer comprises a process selected from the group consisting of (a) spin coating with an organic precursor solution, (b) drop casting with the organic precursor solution, and (c) inkjet printing with the organic precursor solution, and

forming the dielectric layer further comprises baking the dielectric layer using a hot plate patterning the dielectric layer using ultra-violet light and a shadow mask and heat curing the dielectric layer in a vacuum oven.

14. A method for producing a thin-film transistor (TFT) comprising, in this order:

forming a substrate;

applying a metal oxide-based precursor solution onto the substrate to form a metal oxide-based channel layer;

annealing the channel layer;

forming a source electrode and a drain electrode on the channel layer;

forming a dielectric layer on the channel layer; and

forming a gate electrode on the dielectric layer,

wherein,

forming the dielectric layer comprises a process selected from the group consisting of (a) spin coating with an organic precursor solution, (b) drop casting with the organic precursor solution, and (c) inkjet printing with the organic precursor solution,

the organic precursor solution is prepared using (a) a poly-vinyl-phenol (PVP) powder, (b) a poly-melamine-co-formaldehyde cross-linking agent, and (c) a solvent,

the solvent is selected from the group consisting of (a) propylene glycol monomethyl ether acetate (PGMEA), (b) n-butanol, (c) 1-propanol, (d) n-methylpyrrolidone (NMP), and (e) acetone,

forming the dielectric layer further comprises (a) baking the dielectric layer using a hot plate, (b) patterning the dielectric layer using ultra-violet light and a shadow mask, and (c) heat curing the dielectric layer in a vacuum oven, and

the heat curing the dielectric layer is done at a temperature lower than or equal to 200° C.

15. The method according to claim 14 wherein the heat curing the dielectric layer is done at a temperature greater than or equal to 175° C.

Assignments (6)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 18, 2025
From: JDI DESIGN AND DEVELOPMENT G.K.
To: MAGNOLIA BLUE CORPORATION
Reel/Frame 072039/0656 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 31, 2024
From: JOLED, INC.
To: JDI DESIGN AND DEVELOPMENT G.K.
Reel/Frame 066382/0619 →
CORRECTION BY AFFIDAVIT FILED AGAINST REEL/FRAME 063396/0671 Recorded Jun 12, 2023
From: JOLED, INC.
To: JOLED, INC.
Reel/Frame 064067/0723 →
SECURITY INTEREST Recorded Apr 20, 2023
From: JOLED, INC.
To: INCJ, LTD.
Reel/Frame 063396/0671 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 15, 2015
From: SONY CORPORATION
To: JOLED INC.
Reel/Frame 036106/0355 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 28, 2010
From: WANG, CHUNMEI; NG, WEI BENG; ISHIDA, TAKEHISA
To: SONY CORPORATION
Reel/Frame 024752/0659 →