Computer chip set having on board wireless interfaces to support test operations
View Patent ↗A method and apparatus are provided for an embedded wireless interface that is embedded in, for example, one of an input and output controller device for controlling input and output communications with off-board devices, within a memory controller device and a processor motherboard. The embedded wireless interface may be utilized as a wireless test access point to provide signal stimulations for test purposes or to monitor communications over a specified wired communication link.
1. An apparatus for monitoring and testing a circuit installed in a circuit board, comprising:
first and second circuit blocks of the circuit coupled via a wired communication path for conducting ongoing signal data transmissions by transmitting data through the wired communication path; and
first and second transceivers disposed in the circuit board, the first transceiver for wirelessly receiving from the second transceiver one of a sample of the ongoing signal data transmissions being transmitted through the wired transmission or a signal reflecting a characteristic of the ongoing signal data transmissions;
wherein the first transceiver further wirelessly transmits to a remote test device the one of the sample of the ongoing signal data transmissions or the signal reflecting the characteristic of the ongoing signal data transmissions via a wireless communication link with the remote test device.
2. The apparatus of claim 1 , further comprising:
a processor coupled to the first transceiver for producing a test signal based upon a received test signal value from the remote test device.
3. The apparatus of claim 2 , wherein the processor further measures a response based upon the produced test signal and wirelessly transmitting the response to at least one external device via the first transceiver.
4. The apparatus of claim 3 , wherein the test signal value and the response are both transmitted through a wireless access point coupled to a data packet network to which the remote test device is coupled.
5. The apparatus of claim 2 , wherein the first and second blocks are circuit blocks co-located on a common circuit board.
6. The apparatus of claim 2 , wherein the processor further executes test procedures and transmits test data received from test points in the first and second circuit blocks via the first and second transceivers to the remote test device as a part of the test procedures.
7. The apparatus of claim 2 , wherein the processor further simulates an operation and transmits corresponding data received from the first and second circuit blocks via the first and second transceivers to the remote test device as a part of the simulated operation.
8. A system, comprising:
first and second circuit blocks coupled via a wired communication path for transmitting signals therebetween;
first and second wireless transceivers for wirelessly communicating therebetween to support test procedures to test at least a portion of the first or second circuit blocks;
wherein one of the first and second wireless transceivers further wirelessly transmits to a remote test device one of a sample of the transmitted signals, a signal reflecting a characteristic of the transmitted signals, or test data from a specified test point transmitted wirelessly between the wireless transceivers within the device.
9. The system of claim 8 , further comprising:
a processor for producing a test signal based upon a received test signal value from the remote test device.
10. The system of claim 9 , wherein the processor further measures a response based upon the produced test signal and wirelessly transmits the response to at least one device via one of the first and second transceivers.
11. The system of claim 10 , wherein the test signal value and the response are both transmitted through a wireless access point coupled to a data packet network to which the remote test device is coupled.
12. The system of claim 8 , wherein the first and second blocks are circuit blocks co-located on a common circuit board.
13. The system of claim 8 , wherein the first and second blocks are circuit blocks co-located within a common device.
14. The system of claim 8 , wherein the first and second blocks are circuit blocks located within different devices.
15. A device, comprising:
first and second integrated circuit blocks having a primary wired communication link for communicating therebetween;
a first transceiver coupled to the first integrated circuit block for creating a wireless communication link between the first integrated circuit block and a remote third circuit block to support testing or monitoring operations specified by the remote third block; and
a second transceiver coupled to the second integrated circuit block for wirelessly communicating with the first transceiver to transmit data corresponding with communications on the primary wired communication link between the first and second integrated circuit blocks;
wherein the first integrated circuit block further wirelessly communicating with the third circuit block via the first transceiver to transmit the data corresponding with the communications on the primary wired communication link.
16. The device of claim 15 , wherein the first transceiver further wirelessly transmits sensor data for at least one sensor associated with the first circuit block.
17. The device of claim 16 , wherein the sensor data comprises at least one of management, health and performance information associated with the device.
18. The device of claim 15 , wherein the first transceiver further receives from the third circuit block a specified signal to be transmitted to a specified test point within the first and second integrated circuit blocks and wirelessly transmits an associated output signal to the third circuit block.