IP Library Granted Patent US 8,284,283
Granted Patent B2
US 8,284,283 · App. 12/857,157 · Granted Oct 9, 2012

Amplification type solid state imaging device

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Quick Facts
Patent No.
US 8,284,283
App. No.
12/857,157
Granted
Oct 9, 2012
Kind
B2
Abstract

An amplification type solid state imaging device in use includes at least a light-receiving portion 10 formed by arranging on a semiconductor substrate 7 one-dimensionally or two-dimensionally a plurality of pixels that convert incident light to signal charge and output electric signals corresponding to the amount of the signal charge, a reader for reading out sequentially the electric signals from the respective pixels, a noise rejection circuit 11 for suppressing spurious signals for the electric signals read out by the reader, and a first light-shielding layer 1 positioned on the upper part of the light-receiving portion 10 so as to restrict entry of light into parts other than photoelectric conversion portions 10 a of the pixels. Furthermore, a second light-shielding layer 2 for restricting entry of light into the noise rejection circuit 11 is provided on the upper part of the noise rejection circuit 11.

Claims (8)

1. An amplification type solid state imaging device comprising:

a light receiving portion formed by arranging on a semiconductor substrate one-dimensionally or two-dimensionally a plurality of pixels that convert incident light to signal charge and output electric signals corresponding to the amount of the signal charge,

a reader for reading out sequentially the electric signals from the respective pixels,

a noise rejection circuit for suppressing spurious signals for the electric signals read out by the reader,

a first light-shielding layer positioned on the upper part of the light-receiving portion so as to restrict entry of light into the light-receiving portion other than a part for photoelectric conversion,

a second light-shielding layer provided on the upper part of the noise rejection circuit so as to restrict entry of light into the noise rejection circuit,

an electroconductive third light-shielding layer formed in a spacing between the light-receiving portion and the noise rejection circuit, as a layer below the first light-shielding layer and the second light-shielding layer, so as to overlap partially with the first light-shielding layer and the second light-shielding layer in a direction of thickness of the semiconductor substrate, and

wirings capable of applying voltages separately and respectively to the first light-shielding layer, the second light-shielding layer and the third light-shielding layer.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 27, 2020
From: PANASONIC CORPORATION
To: PANASONIC SEMICONDUCTOR SOLUTIONS CO., LTD.
Reel/Frame 052755/0917 →