Method and system for optoelectronic receivers utilizing waveguide heterojunction phototransistors integrated in a CMOS SOI wafer
View Patent ↗A method and system for optoelectronic receivers utilizing waveguide heterojunction phototransistors (HPTs) integrated in a CMOS SOI wafer are disclosed and may include receiving optical signals via optical fibers operably coupled to a top surface of the chip. Electrical signals may be generated utilizing HPTs that detect the optical signals. The electrical signals may be amplified via voltage amplifiers, or transimpedance amplifiers, the outputs of which may be utilized to bias the HPTs by a feedback network. The optical signals may be coupled into opposite ends of the HPTs. A collector of the HPTs may comprise a silicon layer and a germanium layer, a base may comprise a silicon germanium alloy with germanium composition ranging from 70% to 100%, and an emitter including crystalline or poly Si or SiGe. The optical signals may be demodulated by communicating a mixer signal to a base terminal of the HPTs.
1. A method for processing signals, the method comprising:
in a photonically-enabled CMOS chip fabricated from a silicon-on-insulator substrate:
receiving one or more optical signals via a top surface of said photonically-enabled CMOS chip;
generating one or more electrical signals in said photonically-enabled CMOS chip utilizing one or more germanium waveguide heterojunction phototransistors that detect said one or more optical signals; and
demodulating said received one or more optical signals by communicating a mixer signal to a base terminal of said one or more germanium waveguide heterojunction phototransistors.
2. The method according to claim 1 , comprising amplifying said one or more generated electrical signals via one or more transimpedance amplifiers.
3. The method according to claim 2 , comprising biasing said one or more germanium waveguide heterojunction phototransistors by a feedback network for said one or more transimpedance amplifiers.
4. The method according to claim 1 , comprising amplifying said one or more generated electrical signals via one or more voltage amplifiers.
5. The method according to claim 1 , comprising coupling said one or more received optical signals into opposite ends of said one or more germanium waveguide heterojunction phototransistors.
6. The method according to claim 1 , wherein a collector region of said one or more germanium waveguide heterojunction phototransistors comprises a silicon layer and a germanium layer.
7. The method according to claim 1 , wherein a base region of said one or more germanium waveguide heterojunction phototransistors comprises a silicon germanium alloy with germanium composition ranging from 70% to 100%.
8. The method according to claim 1 , wherein an emitter of said one or more germanium waveguide heterojunction phototransistors comprises one or more of: crystalline silicon, crystalline silicon-germanium, poly-silicon, and/or poly- silicon-germanium.
9. The method according to claim 1 , comprising biasing said one or more germanium waveguide heterojunction phototransistors via an optical signal.
10. The method according to claim 1 , comprising detecting said one or more optical signals from said top surface of said photonically-enabled CMOS chip via one or more grating couplers.
11. A system for processing signals, the system comprising:
a photonically-enabled CMOS chip fabricated in a silicon-on-insulator substrate, said photonically-enabled CMOS chip being operable to:
receive one or more optical signals via a top surface of said photonically-enabled CMOS chip;
generate one or more electrical signals in said photonically-enabled CMOS chip utilizing one or more germanium waveguide heterojunction phototransistors that detect said one or more optical signals; and
demodulate said received one or more optical signals by communicating a mixer signal to a base terminal of said one or more germanium waveguide heterojunction phototransistors.
12. The system according to claim 11 , wherein said photonically-enabled CMOS chip is operable to amplify said one or more generated electrical signals via one or more transimpedance amplifiers.
13. The system according to claim 12 , wherein said photonically-enabled CMOS chip is operable to bias said one or more germanium waveguide heterojunction phototransistors by a feedback network for said one or more transimpedance amplifiers.
14. The system according to claim 11 , wherein said photonically-enabled CMOS chip is operable to amplifying said one or more generated electrical signals via one or more voltage amplifiers.
15. The system according to claim 11 , wherein said photonically-enabled CMOS chip is operable to couple said one or more received optical signals into opposite ends of said one or more germanium waveguide heterojunction phototransistors.
16. The system according to claim 11 , wherein a collector region of said one or more germanium waveguide heterojunction phototransistors comprises a silicon layer and a germanium layer.
17. The system according to claim 11 , wherein a base region of said one or more germanium waveguide heterojunction phototransistors comprises a silicon germanium alloy with germanium composition ranging from 70% to 100%.
18. The system according to claim 11 , wherein an emitter of said one or more germanium waveguide heterojunction phototransistors comprises one or more of: crystalline silicon, crystalline silicon-germanium, poly-silicon, and/or poly-silicon-germanium.
19. The system according to claim 11 , wherein said photonically-enabled CMOS chip is operable to bias said one or more germanium waveguide heterojunction phototransistors via an optical signal.
20. The system according to claim 11 , wherein said photonically-enabled CMOS chip is operable to detect said one or more optical signals from said top surface of said photonically-enabled CMOS chip via one or more grating couplers.