Digital radiography imager with buried interconnect layer in silicon-on-glass and method of fabricating same
View Patent ↗A method embodiment for forming an imaging array includes providing a glass substrate having a top surface, forming a patterned conductive layer on the top surface of the glass substrate, and forming an insulating layer on the patterned conductive layer on a side of the patterned conductive layer opposite the glass substrate. The method can include providing a single crystal silicon substrate having an internal separation layer proximate a first surface of the single crystal silicon substrate. The single crystal silicon substrate is secured to the glass substrate such that the first surface of the single crystal silicon substrate corresponds to the insulating layer. The single crystal silicon substrate is separated at the internal separation layer to create an exposed surface opposite the first surface of the single crystal silicon substrate and an array including one or more photosensitive elements and/or readout elements is formed thereon.
1. A method of forming a digital radiographic detector imaging array, comprising:
providing a glass substrate having a top surface;
forming a patterned conductive layer on the top surface of the glass substrate;
forming an insulating layer on the patterned conductive layer, on a side of the patterned conductive layer opposite the glass substrate;
providing more than one single crystal silicon substrates having an internal separation layer proximate a first surface of the single crystal silicon substrate;
securing the first surface of the single crystal silicon substrates to the glass substrate, with the first surface of the single crystal silicon substrates corresponding to the insulating layer;
separating the single crystal silicon substrates at the internal separation layer to create an exposed surface opposite the first surface of the single crystal silicon substrates;
forming, on more than one of the exposed surfaces, an array comprising a plurality of photosensitive elements and readout elements; and
forming, over the arrays, scintillation screens to receive radiation at a first wavelength, and generate visible radiation having a second wavelength.
2. The method of claim 1 , comprising forming a base insulating layer between the patterned conductive layer and the top surface of the glass substrate.
3. The method of claim 1 , comprising:
forming one or more intermediate interconnect layers between the patterned conductive layer and the insulating layer, each intermediate interconnect layer comprising an additional insulating layer and an additional patterned conductive layer; and
forming one or more vias through one or both of the insulating layer and the additional insulating layer.
4. The method of claim 1 , wherein the step of forming the plurality of photosensitive elements comprises forming a plurality of conductive elements on the exposed surface opposite portions of the patterned conductive layer and electrically connecting the conductive elements to the patterned conductive layer.
5. The method of claim 4 , wherein the step of electrically connecting comprises forming vias through the insulating layer, wherein the single crystal silicon substrate is doped, wherein the securing step comprises securing the single crystal silicon substrate to the insulating layer using one of frit bonding, soldering, anodic bonding, and an adhesive, and comprising polishing the exposed surface prior to forming the array thereon.
6. The method of claim 1 , wherein the step of forming the plurality of photosensitive elements and readout elements comprises forming a pattern in the exposed surface of the single crystal silicon substrate, first portions of the pattern comprising single crystal silicon used in the photosensors and second portions of the pattern comprising single crystal silicon used in the readout elements.
7. The method of claim 1 , further comprising electrically connecting at least one of the photosensitive elements and the readout elements to the patterned conductive layer and electrically connecting the at least one of the photosensitive elements to at least one of the readout elements.
8. The method of claim 1 , wherein the step of forming the plurality of photosensitive elements and readout elements comprises:
forming a pattern in the exposed surface of the single crystal silicon substrate, first portions of the pattern comprising amorphous silicon photosensors and second portions of the pattern comprising single crystal silicon used in the readout elements,
electrically connecting the amorphous silicon photosensitive elements and the readout elements to the patterned conductive layer and electrically connecting the at least one of the amorphous silicon photosensitive elements to at least one of the readout elements.
9. The method of claim 1 , wherein the securing step comprises securing the single crystal silicon substrate to the insulating layer using anodic bonding, and wherein a layer of silicon is formed on the insulating layer to promote anodic bonding.
10. The method of claim 1 , further comprising forming a dielectric layer on the first surface of the single crystal silicon substrate before securing the single crystal silicon substrate to the glass substrate.
11. A method of forming a radiographic imaging array, comprising:
providing a glass substrate having a top surface;
forming a first patterned conductive layer over a surface of the glass substrate opposite the top surface of the glass substrate;
forming an intermediate insulating layer on the patterned conductive layer, on a side of the first patterned conductive layer opposite the base insulating layer;
forming a second patterned conductive layer on the intermediate insulating layer, on a side of the intermediate insulating layer opposite the first patterned conductive layer;
forming a top insulating layer on the second patterned conductive layer, on a side of the second patterned conductive layer opposite the intermediate insulating layer;
providing a single crystal silicon substrate having an internal separation layer proximate a first surface of the single crystal silicon substrate;
bonding the single crystal silicon substrate to the glass substrate, the first surface of the single crystal silicon substrate arranged proximate the top insulating layer at a side of the top insulating layer opposite the second patterned conductive layer;
separating the single crystal silicon substrate at the internal separation layer to create an exposed surface opposite the first surface of the single crystal silicon substrate; and
forming, on the exposed surface, an array of pixels, each pixel comprising a at least one photosensitive element and at least one readout element.
12. The method of claim 11 , comprising forming one or more electrical interconnects between each of the pixels and the first patterned conductive layer, the first patterned layer to be a first global interconnect layer for the pixels.
13. The method of claim 11 , comprising;
forming vias through the intermediate insulating layer, to provide an interconnect between the first patterned conductive layer and the second patterned conductive layer, the second patterned layer to be a second global metallization layer for the pixels; and
forming at least one local conductive layers within each pixel.
14. The method of claim 11 , comprising:
forming a dielectric layer on the first surface of the single crystal silicon substrate before securing the single crystal silicon substrate to the glass substrate; and
forming a base insulating layer on the top surface of the glass substrate, wherein the first patterned conductive layer is on the base insulating layer at a side of the base insulating layer opposite the top surface of the glass substrate.
15. The method of claim 11 , wherein the step of forming at least one photosensitive element and at least one readout elements comprises:
forming a pattern in the exposed surface of the single crystal silicon substrate, first portions of the pattern comprising amorphous selenium direct photosensors and second portions of the pattern comprising single crystal silicon used in the readout elements,
electrically connecting the amorphous selenium direct photosensors and the readout elements to the patterned conductive layer and electrically connecting the amorphous selenium direct photosensors to the readout elements.
16. A radiographic imaging array comprising:
a glass substrate;
a first insulating layer formed on a top surface of the glass substrate;
a first patterned conductive layer formed on the first insulating layer;
a second insulating layer formed on the first patterned conductive layer, on a side of the first patterned conductive layer opposite the first insulating layer;
a dielectric formed on the second insulating layer, on a side of the second insulating layer opposite the first patterned conductive layer;
a patterned single crystal silicon layer having a thickness of less than about 5 microns secured to the second insulating layer, on a side of the second insulating layer opposite the first patterned conductive layer; and
an array of pixels including the patterned single crystal silicon layer, each pixel comprising a photosensitive element and a readout element.
17. The imaging array of claim 16 , further comprising a second patterned conductive layer between the first patterned conductive layer and the second insulating layer, wherein the first patterned conductive layer comprises interconnect for one of horizontal and vertical connection to the pixels and the second patterned conductive layer comprises interconnect for the other of the horizontal and vertical connection to the pixels.
18. The imaging array of claim 16 , further comprising peripheral circuitry disposed at the periphery of the array of pixels, the first patterned conductive layer and the second patterned conductive layer being electrically connected to the peripheral circuitry,
wherein the peripheral circuitry is one or more of row address circuitry, column address circuitry, signal sampling circuitry, signal amplification circuitry, voltage conversion circuitry, timing generation circuitry, signal processing circuitry, analog to digital conversion circuitry, electrostatic discharge protection circuitry, and signal interface circuitry,
wherein the photosensitive element is one of a p-n junction photodiode, a metal-insulator-semiconductor photo-capacitor, a charge coupled device, a phototransistor, and a pinned photodiode.
19. The imaging array of claim 16 , wherein the single crystal silicon layer is formed by separating a single crystal silicon substrate at an internal separation layer.
20. The imaging array of claim 19 , further comprising a silicon layer between the first insulating layer and the glass substrate, the silicon layer being attached by anodic bonding to the glass substrate, wherein the photosensitive element is formed of amorphous silicon or the photosensitive element is formed in the single crystal silicon layer.