IP Library Granted Patent US 9,083,498
Granted Patent B2
US 9,083,498 · App. 12/865,475 · Granted Jul 14, 2015

Method and device for processing data and communication system comprising such device

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Quick Facts
Patent No.
US 9,083,498
App. No.
12/865,475
Granted
Jul 14, 2015
Kind
B2
Abstract

A method and a device are provided for data processing. The data contains symbols and a control parameter is determined based on a correlation property of the symbols of the data. In this manner signal recovery is achieved that is robust against any kind of distortion and is fast enough to track time varying clocking disturbances. Further, a communication system is provided containing such a device.

Claims (25)

1. A method for processing data, wherein said data corresponds to a sequence of symbols, comprising the steps of

sampling an electrical receive signal with a sample rate of N samples per symbol of said signal where N is greater than or equal to 2, and generating a sampled data signal;

generating a multi-dimensional histogram having bins wherein values for each of the N samples per symbol are aligned along a respective axis associated with a respective dimension and wherein each of the bins in the histogram is associated with a combination of N sample values for the N samples that are sampled per symbol and each bin has a value specifying a relative frequency of occurrence of the associated combination of values;

comparing values of bins of said samples in the histogram to generate difference values wherein the histogram has at least one symmetry property;

accumulating said difference values to derive a control parameter; and

controlling a phase of a sampling clock signal in relation to a phase of said data signal or controlling a phase of samples generated by interpolation of said samples based on said control parameter to improve the symmetry property of the histogram.

2. The method according to claim 1 , wherein each symbol is sampled twice to product a first sample and a second sample.

3. The method according to claim 2 , wherein the symbols are sampled with a phase difference between the first samples and second samples (s 2 ) corresponding to one half of a symbol duration T/2 or to k times of one half of a symbol duration kT/2, where k is a natural number and T the symbol duration.

4. The method according to claim 2 , wherein the control parameter is determined according to

R=Σ i=1 q Σ j=1 i ( H ( i, j ) −H ( j, i ))

wherein

R denotes the control parameter;

H denotes the histogram;

i is a first in bin index of a first axis of the histogram;

j is a second bin index of a second axis of the histogram; and

q denotes a number of quantization bins.

5. The method according to claim 1 , wherein the histogram or portions thereof are weighted or filtered.

6. The method according to claim 1 , wherein a phase of the sampled data signal is modified pursuant to the control parameter.

7. The method according to claim 1 , wherein the phase of the sampled data signal is modified by controlling a sampling phase of an analog/digital-converter by said control parameter.

8. The method according to claim 7 , wherein the phase of the sampled data signal is modified by an interpolation on an interpolator, which is receiving the samples controlled by said control parameter.

9. The method according to claim 1 , wherein the sampled data signal is processed to detect a digital signal to generate a timing signal or a sampling clock signal.

10. The method according to claim 1 , wherein the control parameter is determined based on a data block comprising a predetermined number of symbols.

11. The method according to claim 1 , wherein the method is provided for optical communication systems, digital radio or mobile communication.

12. A device for processing data comprising a processor unit and/or a hard-wired circuit that is configured such that the method according to claim 1 is executable thereon.

13. The device according to claim 12 , wherein said device is a receiver of an optical communication system.

Assignments (4)
RELEASE OF SECURITY INTEREST Recorded Oct 26, 2018
From: CERBERUS BUSINESS FINANCE, LLC
To: XIEON NETWORKS S.A.R.L.
Reel/Frame 047335/0952 →
SECURITY INTEREST Recorded Dec 16, 2014
From: XIEON NETWORKS S.A R.L
To: CERBERUS BUSINESS FINANCE, LLC, AS COLLATERAL AGENT
Reel/Frame 034639/0201 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 22, 2013
From: NOKIA SIEMENS NETWORKS OY
To: XIEON NETWORKS S.A.R.L.
Reel/Frame 031657/0283 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 5, 2012
From: HAUSKE, FABIAN; KUSCHNEROV, MAXIM; LANKL, BERTHOLD; PIYAWANNO, KITTIPONG; SPINNLER, BERNHARD
To: NOKIA SIEMENS NETWORKS OY
Reel/Frame 028316/0554 →