Semiconductor device having a fin-type semiconductor region
View Patent ↗A fin-semiconductor region ( 13 ) is formed on a substrate ( 11 ). A first impurity which produces a donor level or an acceptor level in a semiconductor is introduced in an upper portion and side portions of the fin-semiconductor region ( 13 ), and oxygen or nitrogen is further introduced as a second impurity in the upper portion and side portions of the fin-semiconductor region ( 13 ).
1. A semiconductor device, comprising:
a fin-semiconductor region formed on a substrate;
a gate insulating film formed on at least each of side surfaces of a predetermined portion of the fin-semiconductor region; and
a gate electrode formed on the gate insulating film, wherein
a first impurity which produces a donor level or an acceptor level in a semiconductor is introduced in an upper portion and side portions of the fin-semiconductor region, and oxygen or nitrogen is further introduced as a second impurity in each of the upper portion and side portions of the fin-semiconductor region,
the first impurity and the second impurity are introduced in the fin-semiconductor region located outside the gate electrode, and
said first impurity and said second impurity are not introduced in a portion of said fin-semiconductor region covered by said gate electrode.
2. The semiconductor device of claim 1 , wherein a resistance of each of the side portions of the fin-semiconductor region is equal to or less than a resistance of the upper portion of the fin-semiconductor region.
3. The semiconductor device of claim 1 , wherein an insulator is formed in the upper portion of the fin-semiconductor region through introduction of the second impurity therein.
4. The semiconductor device of claim 1 , wherein the fin-semiconductor region is formed on an insulating layer formed on the substrate.
5. The semiconductor device of claim 1 , wherein extension regions are formed in the side portions of the fin-semiconductor region located outside the gate electrode through introduction of the first impurity therein.
6. The semiconductor device of claim 5 , further comprising:
insulating sidewall spacers formed on side surfaces of the gate electrode, wherein
the extension regions are formed in portions of the fin-semiconductor region covered with the insulating sidewall spacers, and
source/drain regions are formed in the side portions of the fin-semiconductor region located outside the insulating sidewall spacers through introduction of the first impurity therein.
7. The semiconductor device of claim 1 , wherein the fin-semiconductor region is made of silicon.
8. The semiconductor device of claim 1 , wherein the first impurity is boron, phosphorus, or arsenic.