Distributing clock associated with a wired data connection over wireless interfaces using frequency correction at the transmitter side

1. A method for using a synthesized clock frequency to generate a modulated signal, comprising:

extracting, by a transmitter, clock frequency f 2 from a wired data connection feeding the transmitter with data clocked at the clock frequency f 2 ;

estimating clock frequency error between the clock frequency f 2 and a clock frequency f 1 derived from a local clock of the transmitter;

adding the clock frequency error to the clock frequency f 1 , resulting in a synthesized clock frequency f 2 ;

using the synthesized clock frequency f 2 to modulate a data stream into a modulated signal; and

wherein the modulated signal is OFDM, and using the synthesized clock frequency f 2 to modulate the data comprises using OFDM data symbols of duration associated with the synthesized clock frequency f 2 for creating the modulated signal.

2. The method of claim 1 , wherein adding the clock frequency error to the clock frequency f 1 is done using Direct Digital Synthesis (DDS).

3. The method of claim 2 , wherein the DDS is a discrete component in the transmitter.

4. The method of claim 1 , wherein adding the clock frequency error to the clock frequency f 1 is done numerically by a processor.

5. The method of claim 4 , wherein the processor is also used to modulate the data.

6. The method of claim 4 , wherein adding the clock frequency error to the clock frequency f 1 is done using Direct Digital Synthesis (DDS).

7. The method of claim 1 , wherein the modulated signal is OFDM, and using the synthesized clock frequency f 2 to modulate the data comprises clocking an Inverse Fast Fourier Transform (IFFT) using a clock associated with the synthesized clock frequency f 2 .

8. The method of claim 1 , wherein estimating the clock frequency error between the clock frequency f 2 and the clock frequency f 1 is done by counting clock cycles of the clock frequency f 2 and the clock frequency f 1 over a period, and comparing the counts.

9. The method of claim 1 , wherein the wired data connection feeding the transmitter is an Ethernet wired connection.

10. A method for using a synthesized clock frequency to generate a modulated signal, comprising:

extracting, by a transmitter, clock frequency f 2 from a wired data connection feeding the transmitter with data clocked at the clock frequency f 2 ;

estimating clock frequency error between the clock frequency f 2 and a clock frequency f 1 derived from a local clock of the transmitter;

adding the clock frequency error to the clock frequency f 1 , resulting in a synthesized clock frequency f 2 ;

using the synthesized clock frequency f 2 to modulate a data stream into a modulated signal;

up-converting the modulated signal into a wireless signal containing the synthesized clock frequency f 2 ;

down-converting, by a receiver, the wireless signal into a down-converted wireless signal;

de-modulating the down-converted wireless signal into a received data stream;

reconstructing the synthesized clock frequency f 2 into a reconstructed synthesized clock frequency f 2 as a direct result of de-modulating the down-converted wireless signal into a reconstructed data; and

feeding a second wired data connection, at the receiver, with the reconstructed data; and

clocking the second wired data connection using the reconstructed synthesized clock frequency f 2 .

11. The method of claim 10 , wherein the second wired data connection is an Ethernet wired connection.

12. The method of claim 10 , wherein reconstructing synthesized clock frequency f 2 is done in the de-modulator by locking into symbol timing of the down-converted wireless signal during de-modulation.

13. A method for using a synthesized clock frequency to generate a wireless signal, comprising:

extracting, by a transmitter, clock frequency f 2 from a wired data connection feeding the transmitter with data clocked at the clock frequency f 2 ;

estimating clock frequency error between the clock frequency f 2 and a clock frequency f 1 derived from a local clock of the transmitter;

adding the clock frequency error to the clock frequency f 1 , resulting in a synthesized clock frequency f 2 ;

modulating a data stream into a modulated signal;

up-converting, using the synthesized clock frequency f 2 , the modulated signal into a wireless signal; and

wherein using the synthesized clock frequency f 2 to up-convert the modulated signal comprises using the synthesized clock frequency f 2 to create a carrier frequency fed into a mixer used for the up-conversion.

14. The method of claim 13 , wherein adding the clock frequency error to the clock frequency f 1 is done using Direct Digital Synthesis (DDS).

15. The method of claim 14 , wherein the DDS is a discrete component in the transmitter.

16. The method of claim 13 , wherein adding the clock frequency error to the clock frequency f 1 is done numerically by a processor.

17. The method of claim 13 , wherein estimating the clock frequency error between the clock frequency f 2 and the clock frequency f 1 is done by counting clock cycles of the clock frequency f 2 and the clock frequency f 1 over a period, and comparing the counts.

18. The method of claim 13 , further comprising:

reconstructing, by a radio of a receiver, from the wireless signal, the synthesized clock frequency f 2 into reconstructed synthesized clock frequency f 2 ; and

clocking a second wired data connection, at the receiver, using the reconstructed synthesized clock frequency f 2 .

19. The method of claim 18 , wherein the extraction is done using a Phase Lock Loop (PLL).

20. The method of claim 18 , wherein the extraction is done using a narrow filter.

21. The method of claim 18 , wherein the second wired data connection is an Ethernet wired connection.

22. The method of claim 13 , wherein the wired data connection feeding the transmitter is an Ethernet wired connection.

23. A method for using a synthesized clock frequency to generate a modulated signal and up-convert it to a wireless signal, comprising:

extracting, by a transmitter, clock frequency f 2 from a wired data connection feeding the transmitter with data clocked at the clock frequency f 2 ;

estimating clock frequency error between the clock frequency f 2 and a clock frequency f 1 derived from a local clock of the transmitter;

adding the clock frequency error to the clock frequency f 1 , resulting in a synthesized clock frequency f 2 ;

using the synthesized clock frequency f 2 to modulate a data stream into a modulated signal containing the synthesized clock frequency f 2 ;

up-converting, using the synthesized clock frequency f 2 , the modulated signal into a wireless signal containing synthesized clock frequency f 2 ;

down-converting, by a receiver, the wireless signal into a down-converted wireless signal;

de-modulating the down-converted wireless signal into a received data stream;

reconstructing synthesized clock frequency f 2 into reconstructed synthesized clock frequency f 2 as a direct result of de-modulating the down-converted wireless signal into a received data stream;

feeding a second wired data connection, at the receiver, with the received data stream; and

clocking the second wired data connection using the reconstructed synthesized clock frequency f 2 .

24. The method of claim 23 , wherein the second wired data connection is an Ethernet wired connection.

25. The method of claim 23 , wherein the wired data connection feeding the transmitter is an Ethernet wired connection.

26. The method of claim 23 , wherein the modulated signal is an Orthogonal Frequency Division Multiplexing (OFDM) signal.

27. The method of claim 26 , wherein reconstructing synthesized clock frequency f 2 into reconstructed synthesized clock frequency f 2 is done in the de-modulator by locking into a pilot component of the OFDM signal conveyed by the down-converted wireless signal.