A latch circuit includes a feedback circuit having inverter circuits and at least two input terminals and an input circuit for inputting input signals or signals having the same phase as the input signals to the input terminals of the feedback circuit in synchronization with a clock signal. In the feedback circuit section, only when the input signals or the signals having the same phase as the input signals are input to the at least two input terminals at the same time, positive feedback using a predetermined number of amplification stages is applied to the input terminals.
1. A latch circuit comprising:
a feedback circuit in which inverter circuits are connected in a ring shape; and
a first input circuit for inputting a first signal to the feedback circuit, the first signal being input in synchronization with a clock signal; and
a second input circuit for inputting a second signal to the feedback circuit, the second signal being input in synchronization with the clock signal, the second signal having same phase as the first signal,
wherein a first number of amplification stages is defined as a number of amplification stages of the feedback circuit for positive feedback about the first signal or the second signal by the feedback circuit if the first signal is input to the feedback circuit only or if the second signal is input to the feedback circuit only,
wherein a second number of amplification stages is defined as a number of amplification stages of the feedback circuit for positive feedback about the first signal by inputting the second signal to the feedback circuit, or a number of amplification stages of the feedback circuit for positive feedback about the second signal by inputting the first signal to the feedback circuit, and
wherein the first number of amplification stages is larger than the second number of amplification stages.
2. The latch circuit according to claim 1 , wherein the second number of amplification stages is two.