Mounted semiconductor device and a method for making the same
View Patent ↗A method for mounting a semiconductor device onto a composite substrate, including a submount and a heat sink, is described. According to one aspect of the invention, the materials for the submount and the heat sink are chosen so that the value of coefficient of thermal expansion of the semiconductor device is in between the values of coefficients of thermal expansion of the materials of the submount and the heat sink, the thickness of the submount being chosen so as to equalize thermal expansion of the semiconductor device to that of the surface of the submount the device is mounted on. According to another aspect of the invention, the semiconductor device, the submount, and the heat sink are soldered into a stack at a single step of heating, which facilitates reduction of residual post-soldering stresses.
1. A mounted planar semiconductor device, comprising:
a heat sink having a flat surface, a submount having two opposing first and second flat surfaces, and a planar semiconductor device having a flat mounting surface, wherein the flat surface of the heat sink is soldered to the first flat surface of the submount using a first solder film, and the second flat surface of the submount is soldered to the flat mounting surface of the planar semiconductor device using a second solder film, so as to form a stack;
wherein the planar semiconductor device, the submount, and the heat sink have first, second, and third coefficients of thermal expansion CTE 1 , CTE 2 , and CTE 3 , respectively, wherein said coefficients of thermal expansion are measured in a direction parallel to said flat surfaces, and wherein CTE 3 >CTE 1 >CTE 2 or CTE 3 <CTE 1 <CTE 2 .
2. A mounted planar semiconductor device of claim 1 , wherein the heat sink comprises copper (Cu); the submount comprises silicon carbide (SiC); the planar semiconductor device comprises gallium arsenide (GaAs); the solder films comprise a gold-tin alloy (AuSn), wherein the composition of the gold-tin alloy is as follows: Au (70+−10%); Sn (30−+10%).
3. A mounted planar semiconductor device of claim 1 , wherein the residual mechanical stress in the planar semiconductor device is less than 20 MPa.
4. A mounted planar semiconductor device of claim 1 , wherein the residual mechanical stress in the planar semiconductor device is less than 10 MPa.
5. A mounted planar semiconductor device of claim 1 , wherein the heat sink is a header of a semiconductor device package.
6. A mounted planar semiconductor device of claim 1 , wherein the planar semiconductor device is a laser diode.
7. A mounted planar semiconductor device of claim 1 , wherein the planar semiconductor device is a light emitting diode (LED).
8. A mounted planar semiconductor device of claim 1 , wherein the submount comprises aluminum nitride.
9. A mounted planar semiconductor device of claim 1 , wherein CTE 3 >15*10 −6 /° C.
10. A mounted planar semiconductor device of claim 1 , wherein CTE 1 -CTE 2 >2*10 −6 /° C.
11. A mounted planar semiconductor device of claim 1 , wherein the first and the second solder films each have a melting point, and wherein the melting points of the two films are substantially equal to each other.
12. A mounted planar semiconductor device of claim 1 , wherein the first and the second solder films each have a melting point, and wherein the melting points of the two films are within 10° C. of each other.